HT46R14A データシートの表示（PDF） - Holtek Semiconductor

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HT46R14A

A/D Type 8-Bit OTP MCU

Holtek Semiconductor 

Bit No.

0~2

3

4

5

6

7

HT46R14A

Label

¾

T1E

T1ON

¾

T1M0

T1M1

Function

Unused bit, read as ²0²

Defines the TMR1 active edge of the timer/event counter:

In Event Counter Mode (T1M1,T1M0)=(0,1):

1:count on falling edge;

0:count on rising edge

In Pulse Width measurement mode (T1M1,T1M0)=(1,1):

1: start counting on the rising edge, stop on the falling edge;

0: start counting on the falling edge, stop on the rising edge

Enable/disable timer counting (0= disable; 1= enable)

Unused bit, read as ²0²

Define the operating mode (T1M1, T1M0)

01= Event count mode (External clock)

10= Timer mode (Internal clock)

11= Pulse Width measurement mode (External clock)

00= Unused

TMR1C (11H) Register

Programmable Pulse Generator - PPG

This device contains two 8-bit PPG output channels.

Each PPG has a programmable period of 256´T, where

²T² can be 1/fSYS, 2/fSYS, 4/fSYS, 8/fSYS, 16/fSYS, 32/fSYS,

64/fSYS, 128/fSYS for an output pulse width.

The PPG detects the falling edge of a trigger input, and

then outputs a single pulse. The falling edge trigger may

come from comparators, INT0, INT1 or software trigger

bit, it can be selected by software, The PPG is capable

of generating signals from 0.25ms to 8.192ms pulse

width when the system frequency is operating at 4MHz.

The PPG can set the polarity control bit (PxLEV) to be

an active low or active high output (by mask option). A

²00H² data write to the PPGTx register yields a pulse

width 256´T output.

· PPG0 functional description

The PPG module consists of PPG timers, a PPG

Mode Control, two comparators. Each of PPG timers

consists of a prescaler, one 8-bit up-counter timer,

and an 8-bit preload data register. The programmable

pulse generator (PPG) starts counting at the current

contents in the preload register and ends at ²FFH®

00H², Once an overflow occurs, the counter is re-

loaded from the PPG timer counter preload register,

and generates an signal to stop the PPG timer. The

software trigger bit (PxST) will be cleared when the

PPG timer overflow occurs.

There are four registers related to the PPG output

function, two control registers: PPG0C and PPG1C

and two timer preload register PPGT0 and PPGT1.

Two control registers PPG0C and PPG1C define the

PPG0 and PPG1 input control mode (trigger source),

enable or disable the comparators, define the PPG0

or PPG1 timer prescaler rate, range form fSYS/1, fSYS/2,

fSYS/4, fSYS/8, fSYS/16, fSYS/32, fSYS/64, fSYS/128, enable

or disable stopping the PPG0/PPG1 timer using

PISP/INT0 triggered input, enables or disable restart-

ing the PPG0/PPG1timer using C1VO/PIRS triggered

input, and control the PPG0/PPG1 software trigger bit

to trigger the PPG0/PPG1 timer ON or OFF. The

PPGT0 is the PPG0 preload register and PPGT1 is

PPG1 preload register, these two register content de-

cide the output pulse width.

The PPG1 output is pin-shared with PA0. The function

is selected via configuration option. If it is not selected

as PPG1, the pin can operate as a normal I/O pin. If

the pin is selected as a PPG1 output pin, the I/O func-

tion is disabled automatically.

Any action causing PPG to stop such as a PPG timer

overflow, a SW stop (P0ST=1 ® 0) - will cause the fol-

lowing actions to occur:

¨ Stop and clear the PPG prescaler (prescaler means

prescaling counter, not P0PSC[2:0] in PPG0C)

¨ The PPG timer will be reloaded

¨ PxST will cleared

¨ PPGxO will be inactive

For a start delay £ 0.5 ´ (1/fSYS), when the start SYNC

with clock is selected, the PPG pulse output will be

trgiggered by either the rising or falling edge of the

next clock (fSYS) edge. After the PPG starts, the PPG

output becomes active and its prescaler begins to

count as soon as first transition (falling or raising) of

the system clock arrives. After the first trigger has

completed, the following clock edge trigger type is de-

cided by the first one. For example, once the PPG

starts and if the next arriving clock transition is a falling

edge, the PPG will be triggered by a falling edge until

the PPG stops and vice versa.

Rev. 1.00

17

August 3, 2007

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