HT46R49 データシートの表示（PDF） - Holtek Semiconductor

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HT46R49

Cost-Effective A/D Type 8-Bit MCU

Holtek Semiconductor 

HT46R46/C46/R47/C47/R48A/C48A/R49

· PWM Outputs

All devices contain one or two PWM outputs pin

shared with pins PD0 and PD1. The PWM output

functions are chosen via configuration options and re-

main fixed after the device is programmed. Note that

the corresponding bit or bits of the port control regis-

ter, PDC, must setup the pin as an output to enable

the PWM output. If the PDC port control register has

setup the pin as an input, then the pin will function as a

normal logic input with the usual pull-high option, even

if the PWM configuration option has been selected.

· A/D Inputs

Each device has four A/D converter inputs. All of

these analog inputs are pin-shared with I/O pins on

Port B. If these pins are to be used as A/D inputs and

not as normal I/O pins then the corresponding bits in

the A/D Converter Control Register, ADCR, must be

properly set. There are no configuration options asso-

ciated with the A/D function. If used as I/O pins, then

full pull-high resistor configuration options remain,

however if used as A/D inputs then any pull-high resis-

tor options associated with these pins will be automat-

ically disconnected.

D a ta B u s

P u ll- H ig h

C o n tr o l B it O p tio n

DQ

V DD

W eak

P u ll- u p

W r ite C o n tr o l R e g is te r

C h ip R e s e t

R e a d C o n tr o l R e g is te r

W r ite D a ta R e g is te r

R e a d D a ta R e g is te r

S y s te m W a k e -u p

CK Q

S

D a ta B it

DQ

CK Q

S

M

U

X

I/O P in

W a k e - u p O p tio n P A o n ly

Non-pin-shared Function Input/Output Ports

D a ta B u s

P u ll- H ig h

C o n tr o l B it O p tio n

DQ

V DD

W eak

P u ll- u p

W r ite C o n tr o l R e g is te r

C h ip R e s e t

CK Q

S

R e a d C o n tr o l R e g is te r

W r ite D a ta R e g is te r

R e a d D a ta R e g is te r

IN T fo r P A 5 o n ly

T M R fo r P A 4 o n ly

S y s te m W a k e -u p

D a ta B it

DQ

CK Q

S

M

U

X

W a k e - u p O p tio n

PA4/PA5 Input/Output Ports

P A 4 /T M R

P A 5 /IN T

Rev. 1.30

18

June 5, 2008

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