HT46R48E データシートの表示（PDF） - Holtek Semiconductor
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HT46R48E Datasheet PDF : 46 Pages
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HT46R48E
EEPROM A.C. Characteristics
Ta=25°C
Symbol
Parameter
Remark
Standard Mode* VCC=5V±10%
Unit
Min. Max. Min. Max.
fSK
Clock Frequency
¾
¾
100
¾
400 kHz
tHIGH
Clock High Time
¾
4000 ¾
600
¾
ns
tLOW
Clock Low Time
¾
4700 ¾ 1200 ¾
ns
tr
SDA and SCL Rise Time
Note
¾ 1000 ¾
300
ns
tf
SDA and SCL Fall Time
Note
¾
300
¾
300
ns
tHD:STA
START Condition Hold Time
After this period the first
clock pulse is generated
4000
¾
600
¾
ns
tSU:STA
START Condition Setup Time
Only relevant for repeated
START condition
4000
¾
600
¾
ns
tHD:DAT Data Input Hold Time
¾
0
¾
0
¾
ns
tSU:DAT Data Input Setup Time
¾
200
¾
100
¾
ns
tSU:STO STOP Condition Setup Time
¾
4000 ¾
600
¾
ns
tAA
Output Valid from Clock
¾
¾ 3500 ¾
900
ns
tBUF
Bus Free Time
Time in which the bus must
be free before a new trans- 4700 ¾ 1200 ¾
ns
mission can start
tSP
Input Filter Time Constant
(SDA and SCL Pins)
Noise suppression time
¾
100
¾
50
ns
tWR
Write Cycle Time
¾
¾
5
¾
5
ms
Note: These parameters are periodically sampled but not 100% tested
* The standard mode means VCC=2.2V to 5.5V
For relative timing, refer to timing diagrams
Rev. 1.10
6
March 24, 2006
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