HY27SA081G1M-FC データシートの表示（PDF） - Hynix Semiconductor

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HY27SA081G1M-FC

1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory

Hynix Semiconductor 

HY27UA(08/16)1G1M Series

HY27SA(08/16)1G1M Series

1Gbit (128Mx8bit / 64Mx16bit) NAND Flash

CLE

CE

WE

ALE

RE

RB

I/O

00h/

01h/ 50h

Command

Code

tBLBH1

(read)

Address Input

Busy

Data Output (sequentially)

Figure 10. Read (A, B, C) Operation

Note: 1. If tELWL is less than 10ns, tWLWH must be minimum 35ns, otherwise, tWLWH may be minimum 25ns.

A9-A26(1)

Read A Command, x8 Devices

Area A

(1st half Page)

Area B

(2nd half

Page)

Area C

(Spare)

A9-A26(1)

Read A Command, x16 Devices

Area A

(main area)

Area C

(50h)

A0-A7

A0-A7

A9-A26(1)

A0-A7

Read B Command, x8 Devices

Area A

(1st half Page)

Area B

(2nd half

Page)

Area C

(Spare)

A9-A26(1)

A0-A3 (x8)

A0-A2 (x16)

Figure 11. Read Block Diagrams

Read C Command, x8/x16 Devices

Area A

Area A/B

Area C

(Spare)

A4-A7 (x8), A3-A7 (x16) are don't care

Note: 1. Highest address depends on device density.

Rev 0.5 / Oct. 2004

15

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