ICS85105I データシートの表示（PDF） - Integrated Device Technology

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ICS85105I

LOW SKEW, 1-TO-5, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER

Integrated Device Technology 

ICS85105I

LOW SKEW, 1-TO-5, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER

TABLE

5.

AC

CHARACTERISTICS,

V

DD

=

3.3V±10%,

TA

=

-40°C

TO

85°C

Symbol Parameter

Test Conditions

Minimum Typical Maximum Units

fMAX

Output Frequency

CLK_SEL = 0

CLK_SEL = 1

500

MHz

250

MHz

tPD

Propagation Delay; NOTE 1

CLK_SEL = 0

2.0

CLK_SEL = 1

2.0

3.2

ns

2.8

ns

tsk(o) Output Skew; NOTE 2, 4

100

ps

tsk(pp) Part-to-Part Skew; NOTE 3, 4

600

ps

tjit

VMAX

VMIN

Buffer Additive Phase Jitter, RMS;

refer to Additive Phase Jitter Section

Absolute Maximum Output Voltage;

NOTE 5, 10

Absolute Minimum Output Voltage;

NOTE 5, 11

100MHz (12kHz - 20MHz)

0.24

ps

1150

mV

-300

mV

VRB

Ringback Voltage; NOTE 6, 13

-100

100

V

tSTABLE Time before VRB is allowed; NOTE 6, 13

500

ps

V

Absolute Crossing Voltage; NOTE 5, 8, 9

250

CROSS

ΔVCROSS

Total Variation of VCROSS over all edges;

NOTE 5, 8, 12

Rise/Fall Edge Rate; NOTE 6, 7

Measured between

-150mV to +150mV

0.6

550

mV

140

mV

5.5

V/ns

odc

Output Duty Cycle; NOTE 14

45

55

%

All parameters measured at IJ 250MHz unless noted otherwise.

NOTE 1: Measured from the V /2 of the input to the differential output crossing point.

DD

NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output

differential cross points.

NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, and with

equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.

NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.

NOTE 5: Measurement taken from single-ended waveform.

NOTE 6: Measurement taken from differential waveform.

NOTE 7: Measured from -150mV to +150mV on the differential waveform (derived from Qx minus nQx). The signal must be

monotonic through the measurement region for rise and fall time. The 300mV measurement window is centered on the differential

zero crossing. See Parameter Measurement Information Section.

NOTE 8: Measured at crossing point where the instantaneous voltage value of the rising edge of Qx equals the falling edge of nQx.

See Parameter Measurement Information Section.

NOTE 9: Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all

crossing points for this measurement. See Parameter Measurement Information Section.

NOTE 10: Defined as the maximum instantaneous voltage including overshoot. See Parameter Measurement Information Section.

NOTE 11: Defined as the minimum instantaneous voltage including undershoot. See Parameter Measurement Information Section.

NOTE 12: Defined as the total variation of all crossing voltage of Rising Qx and Falling nQx. This is the maximum allowed variance

in the V for any particular system. See Parameter Measurement Information Section.

CROSS

NOTE: 13. TSTABLE is the time the differential clock must maintain a minimum ±150mV differential voltage after rising/falling edges

before it is allowed to droop back into the VRB ±100mV differential range. See Parameter Measurement Information Section.

NOTE 14: Input duty cycle must be 50%.

IDT™ / ICS™ 0.7V HCSL FANOUT BUFFER

5

ICS85105AGI REV. A JUNE 5, 2008

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