IDT71V35781SA200BGI データシートの表示（PDF） - Integrated Device Technology

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IDT71V35781SA200BGI

128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Integrated Device Technology 

IDT71V35761, IDT71V35781, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with

3.3V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect

Commercial and Industrial Temperature Ranges

Functional Block Diagram

LBO

ADV

CLK

ADSC

ADSP

A0 - A16/17

GW

BWE

BW1

BW2

BW3

BW4

CE

CS0

CS1

CLK EN

ADDRESS

REGISTER

Byte 1

Write Register

Byte 2

Write Register

Byte 3

Write Register

Byte 4

Write Register

D

Q

Enable

Register

CLK EN

CEN

2

Binary

Counter

CLR

Burst

Sequence

Burst

Logic

A0*

Q0

A1*

Q1

17/18

2

A0,A1

A2–A17

INTERNAL

ADDRESS

17/18

128K x 36/

256K x 18-

BIT

MEMORY

ARRAY

36/18

36/18

Byte 1

Write Driver

9

Byte 2

Write Driver

9

Byte 3

Write Driver

9

Byte 4

Write Driver

9

OUTPUT

REGISTER

DATA INPUT

REGISTER

ZZ

Powerdown

OE

I/O0 — I/O31

I/OP1 — I/OP4

36/18

TMS

TDI

TCK

TRST

(Optional)

D

Q

Enable

Delay

Register

JTAG

(SA Version)

TDO

OE OUTPUT

BUFFER

,

5301 drw 01

6.432

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