IDT72V3673L15PF データシートの表示（PDF） - Integrated Device Technology
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IDT72V3673L15PF Datasheet PDF : 30 Pages
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IDT72V3653/72V3663/72V3673 3.3V CMOS SyncFIFOTM WITH
BUS-MATCHING 2,048 x 36, 4,096 x 36, and 8,192 x 36
COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY
VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, CL = 30 pF
(For 10ns speed grade only: Vcc = 3.3V ± 0.15V; TA = 0ο C to +70ο C; JEDEC JESD8-A compliant)
Symbol
tA
tWFF
tREF
tPAE
tPAF
tPMF
tPMR
tMDV
tRSF
tEN
tDIS
Parameter
Access Time, CLKA↑ to A0-A35 and CLKB↑ to B0-B35
Propagation Delay Time, CLKA↑ to FF/IR
Propagation Delay Time, CLKB↑ to EF/OR
Propagation Delay Time, CLKB↑ to AE
Propagation Delay Time, CLKA↑ to AF
Propagation Delay Time, CLKA↑ to MBF1 LOW or MBF2 and CLKB↑ to MBF2
LOW or MBF1 HIGH
Propagation Delay Time, CLKA↑ to B0-B35(1) and CLKB↑ to A0-A35(2)
Propagation Delay Time, MBA to A0-A35 valid and MBB to B0-B35 Valid
Propagation Delay Time, RS1 or PRS LOW to AE LOW, AF HIGH, MBF1
HIGH and MBF2 HIGH
Enable Time, CSA and W/RA LOW to A0-A35 Active and CSB LOW and W/RB
HIGH to B0-B35 Active
Disable Time, CSA or W/RA HIGH to A0-A35 at high impedance and CSB HIGH or
W/RB LOW to B0-B35 at high impedance
IDT72V3653L10(3) IDT72V3653L15
IDT72V3663L10(3) IDT72V3663L15
IDT72V3673L10(3) IDT72V3673L15
Min. Max. Min. Max. Unit
2
6.5
2
10
ns
2
6.5
2
8
ns
1
6.5
1
8
ns
1
6.5
1
8
ns
1
6.5
1
8
ns
0
6.5
0
8
ns
3
8
2
10
ns
3
6.5
2
10
ns
1
10
1
15
ns
2
6
2
10
ns
1
6
1
8
ns
NOTES:
1. Writing data to the mail1 register when the B0-B35 outputs are active and MBB is HIGH.
2. Writing data to the mail2 register when the A0-A35 outputs are active and MBA is HIGH.
3. For 10ns speed grade: Vcc = 3.3V ± 0.15V; TA = 0° to +70°.
9
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