DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

IDTCV123 データシートの表示(PDF) - Integrated Device Technology

部品番号
コンポーネント説明
メーカー
IDTCV123
IDT
Integrated Device Technology IDT
IDTCV123 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IDTCV123
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
PIN CONFIGURATION
PCI0 1
PCI1 2
VDD_PCI 3
GND_PCI 4
PCI2 5
PCI3 6
PCI4 7
PCI5 8
GND_PCI 9
VDD_PCI 10
*TEST_SEL/PCIF0 11
ITP_EN/PCIF1 12
VDD48 13
USB48/FSB 14
GND48 15
DOT96 16
DOT96# 17
VTT_PWRGD#/PD 18
SRC0 19
SRC0# 20
SRC1 21
SRC1# 22
VDD_SRC 23
GND_SRC 24
SRC2 25
SRC2# 26
SATA_SRC 27
SATA_SRC# 28
56 VDD_REF
55 REF0/FSC
54 REF1/FSA
53 GND_REF
52 X1
51 X2
50 SDAT
49 SCL
48 GND_CPU
47 CPU0
46 CPU0#
45 VDD_CPU
44 CPU1
43 CPU1#
42 IREF
41 GND_A
40 VDD_A
39 CPU_ITP/SRC6
38 CPU_ITP#/SRC6#
37 VDD_SRC
36 SRC5
35 SRC5#
34 GND_SRC
33 SRC4
32 SRC4#
31 SRC3
30 SRC3#
29 VDD_SRC
* = Internal pull down
SSOP
TOP VIEW
COMMERCIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Min
Max Unit
VDDA
3.3V Core Supply Voltage
4.6
V
VDDIN
3.3V Logic Input Supply Voltage GND - 0.5
4.6
V
TSTG
Storage Temperature
–65
+150 °C
TAMBIENT Ambient Operating Temperature
0
+70
°C
TCASE
Case Temperature
+115 °C
ESD Prot Input ESD Protection
2000
V
Human Body Model
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
ITP_EN
1
0
pin 38
CPUC2_ITP
SRCC6
pin 39
CPUT_ITP
SRCT6
TEST CLARIFICATION TABLE
HW
SW
TEST_SEL/ TEST SELECT
PCICLK_F0 BIT B6b6 OUTPUT
Comments
0
0
Normal NormalOperation
1
X
Hi-Z Power-up with TEST_SEL =1 to
enter test mode. Cycle power with
TEST_SEL = 0 to disable test mode
0
1
Hi-Z If TEST_SEL HW pin is 0 during
power-up, test mode can be invoked
through B6b6. Cycle power with
TEST_SEL = 0 to disable test mode.
FREQUENCY SELECTION TABLE
FSC, B, A CPU Mode, MHz
SRC4
SRC[3:1], SRC[7:5]
PCI
101
100
100
100
33.3
001
133
100
100
33.3
011
166
100
100
33.3
010
200
100
100
33.3
000
266
100
100
33.3
100
333
100
100
33.3
110
400
100
100
33.3
111
Reserve
100
100
33.3
2
USB
DOT96
REF
48
96
14.318
48
96
14.318
48
96
14.318
48
96
14.318
48
96
14.318
48
96
14.318
48
96
14.318
48
96
14.318

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]