IDTCV123 データシートの表示（PDF） - Integrated Device Technology
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IDTCV123 Datasheet PDF : 16 Pages
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IDTCV123
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
COMMERCIAL TEMPERATURE RANGE
PIN DESCRIPTION
Pin Number
Name
Type
1
PCI0
OUT
2
PCI1
OUT
3
VDD_PCI
PWR
4
VSS_PCI
GND
5
PCI2
OUT
6
PCI3
OUT
7
PCI4
OUT
8
PCI5
OUT
9
VSS_PCI
GND
10
VDD_PCI
PWR
11
TEST_SEL/PCIF0
I/O
12
ITP_EN/PCIF1
OUT
13
VDD48
PWR
14
USB48 /FS_B
I/O
15
VSS48
GND
16
DOT96T
OUT
17
DOT96C
OUT
18
VTT_PWRGD#/PD
I/O
19
SRCT0
OUT
20
SRCC0
OUT
21
SRCT1
OUT
22
SRCC1
OUT
23
VDD_SRC
PWR
24
VSS_SRC
GND
25
SRCT2
OUT
26
SRCC2
OUT
27
SRCT_SATA
OUT
28
SRCC_SATA
OUT
29
VDD_SRC
PWR
30
SRCC3
OUT
31
SRCT3
OUT
32
SRCC4
OUT
33
SRCT4
OUT
34
VSS_SRC
GND
35
SRCC5
OUT
36
SRCT5
OUT
37
VDD_SRC
PWR
38
CPUC2_ITP/ SRCC6 OUT
39
CPUT2_ITP/ SRCT6
OUT
40
VDD_A
PWR
41
VSS_A
GND
42
IREF
OUT
Description
PCI clock
PCI clock
3.3V
GND
PCI clock
PCI clock
PCI clock
PCI clock
GND
3.3V
Test Select (sampled at VTT_PWRGD# assertion), see TEST_SEL table. PCI clock afterward, free
running.
Pin38, 39, CPU_ITP/SRC6 select (sampled on VTT_PWRGD# assertion), HIGH = CPU_2PCI
clock. PCI clock afterward, running.
3.3V
48MHz clock/ FS_B input
GND
96MHz 0.7V current mode differential clock output
96MHz 0.7V current mode differential clock output
3.3V LVTTL input is a level-sensitive strobe used to latch the FS_A, FS_B, FS_C, TEST_SEL and
ITP_EN inputs, VTT_PWRGD# is low assertion/ After VTT_PWRGD# assertion, becomes a real-time
input for asserting power down (active HIGH).
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
3.3V
GND
Differential Serial reference clock
Differential Serial reference clock
SATA clock
SATA clock
3.3V
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
GND
Differential Serial reference clock
Differential Serial reference clock
3.3V
Selectable CPU or SRC differential clock output. ITP_EN=0 @ VTT_PWRGD# assertion = SRCC6.
Selectable CPU or SRC differential clock output. ITP_EN=0 @ VTT_PWRGD# assertion = SRCT6.
3.3V
GND
Reference current for differential output buffer
3
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