IDTCV123 データシートの表示（PDF） - Integrated Device Technology
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IDTCV123 Datasheet PDF : 16 Pages
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IDTCV123
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
BYTE 4
Bit
7
6
5
4
3
2
1
0
Output(s) Affected
Reserved
DOT96
PCIF1
PCIF0
Reserved
Reserved
Reserved
Reserved
Description / Function
0
DOT96 power down drive mode
Free running, not affected by
PCI/SRC_Stop bit (Byte6, bit3)
Driven in power down
Free-Running
Free-Running
COMMERCIAL TEMPERATURE RANGE
1
Tristate
Stoppable
Stoppable
Type
Power On
1
RW
0
RW
0
RW
0
1
1
1
1
BYTE 5
Bit
7
6
5
4
3
2
1
0
Output(s) Affected
Stopped SRC
Reserved
Reserved
Reserved
SRC
CPU_ITP
CPU1
CPU0
Description / Function
Drive Mode in PCI_Stop
0
Driven
1
Type
Tristate
RW
SRC PWRDWN drive mode
Driven in power down Tristate in power down RW
CPUT2 PWRDWN drive mode
Driven in power down Tristate in power down
RW
CPUT1 PWRDWN drive mode
Driven in power down Tristate in power down
RW
CPUT0 PWRDWN drive mode
Driven in power down Tristate in power down
RW
Power On
0
0
0
0
0
0
0
0
BYTE 6
Bit
7
6
5
4
3
2
1
0
Output(s) Affected
Reserved
Test Select
REF1
REF0
PCI/SRC_STOP
Description / Function
Test Select
Strength Select
Strength Select
Stop all stoppable PCI/SRCT clocks
FS_C latch read back
FS_B latch read back
FS_A latch read back
0
normal
1x
1x
stop
1
Type
All CLK outputs Hi-Z
2x
2x
running
R
R
R
Power On
0
0
1
1
1
BYTE 7
Bit
Output(s) Affected
Description / Function
0
7
Revision ID
6
Revision ID
5
Revision ID
4
Revision ID
3
Vendor ID
2
Vendor ID
1
Vendor ID
0
Vendor ID
7
1
Type
Power On
0
0
0
0
0
1
0
1
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