NX25F080A-3TI-R データシートの表示（PDF） - NexFlash -> Winbond Electronics

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NX25F080A-3TI-R

8M-BIT SERIAL FLASH MEMORY WITH 4-PIN SPI INTERFACE

NexFlash -> Winbond Electronics 

NX25F080A

Write Configuration Register

The Write Configuration Register command provides

access to the Configuration Register which stores the

current configuration of the HOLD-R/B pin, read-data

clock edge, write protect range, and alternate oscillator

frequency. The Configuration Register is non-volatile.

Once set using the Write Configuration Register com-

mand, the contents will maintain even when power is

removed. Because the register’s state is stored in

non-volatile memory, there is a finite endurance limit to

the number of times it can be written to. To limit the

number of writes, it is recommended that before writing to

the Configuration Register it should first be read from

using the Read Configuration Register command. If no

change is required, the Write Configuration Register

command can be skipped. This process will help extend

the endurance of the Configuration Register bits and

eliminate additional programming “busy” time.

The Write Configuration Register command sequence

starts with the command byte (8AH) followed by a 16-bit

field that specifies Configuration Register bit settings.

Although the field is 16-bits long, only bits CF[8:0] are

used. All other upper bits are reserved and must be

clocked using 0 for data. After an additional 16 control

clocks using 0 for data, the command can be completed

by asserting CS high. The device will become busy for a

short time (tWP) while the non-volatile memory cells of the

Configuration Register are programmed.

Write

Configuration

Register Configuration

Command

Bits*

16 Clocks

SI

8AH

CF[15:0]

0000H

SO

*The CF Register only uses bits [8:0]

Read Status Register

The Read Status Register command provides access to the

Status Register and its status flags for Ready/Busy (R/B),

SRAM and program buffer transfer operations (TX), Write

Enable/Disable (WE), and Compare Not Equal (CNE)

( Figure 8) The command sequence is similar to the Read

Read Status

Register

Command

16 Clocks

16 Clocks

16 Clocks

SI

83H

0000H

0000H

0000H

from Sector command except that the sector address field

S[15:0] and the byte-address field B[15:0] are replaced by

all 0 bits. After 16 clocks and the Ready/Busy status field

RB[15:0] has been read, an 8-bit Status field ST[7:0]

provides the contents of the Status Register.

SO

RB[15:0]

ST[7:0]

Read/Busy Read Status

Status Register Bits

18

NexFlash Technologies, Inc.

PRELIMINARY NXSF005C-0699

06/11/99 ©

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