ISL85402(2011) データシートの表示（PDF） - Intersil

部品番号

コンポーネント説明

メーカー

ISL85402
(Rev.:2011)

2.5A Regulator with Integrated High-Side MOSFET for Synchronous Buck or Boost Buck Converter

Intersil 

Performance Curves (Continued)

ISL85402

VOUT 5V/DIV

IL_BOOST 2A/DIV

PHASE_BOOST 20V/DIV

PHASE_BUCK 20V/DIV

10ms/DIV

FIGURE 23. BOOST BUCK MODE, VO = 9V, IO= 1.8A, BOOST INPUT DROPS FROM 16V TO 9V DC

Functional Description

Initialization

Initially the ISL85402 continually monitors the voltage at EN pin.

When the voltage on EN pin exceeds its rising ON threshold, the

internal LDO will start up to build up VCC. After Power-On Reset

(POR) circuits detect that VCC voltage has exceeded the POR

threshold, the soft-start will be initiated.

Soft-Start

The soft-start (SS) ramp is built up in the external capacitor on the

SS pin that is charged by an internal 5µA current source.

CSS[μF] = 6.5 ⋅ tSS[S]

(EQ. 1)

The SS ramp starts from 0 to voltage above 0.8V. Once SS reaches

0.8V, the bandgap reference takes over and IC gets into steady state

operation.

The SS plays a vital role in the hiccup mode of operation. The IC

works as cycle-by-cycle peak current limiting at over load condition.

When a harsh con dit on occurs and the current in upper side

MOSFET reach the second overcurrent threshold, the SS pin is pulled

to ground and a dummy soft-start cycle is initiated. At dummy SS

cycle, the current to charge soft-start cap is cut down to 1/5 of its

normal value. So a dummy SS cycle takes 5x of the regular SS cycle.

During the dummy SS period, the control loop is disabled and no

PWM output. At the end of this cycle, it will start the normal SS. The

hiccup mode persist until the second overcurrent threshold is no

longer reached.

The ISL85402 is capable of starting up with prebiased output.

PWM Control

Pulling the MODE pin to GND will set the IC in forced PWM mode.

The ISL85402 employ the peak current mode PWM control for fast

transient response and cycle-by-cycle current limiting. See “Block

Diagram” on page 4.

The PWM operation is initialized by the clock from the oscillator. The

upper MOSFET is turned on by the clock at the beginning of a PWM

cycle and the current in the MOSFET starts to ramp up. When the

sum of the current sense signal and the slope compensation signal

reaches the error amplifier output voltage level, the PWM

comparator is trigger to shut down the PWM logic to turn off the

high-side MOSFET. The high-side MOSFET stays off until the next

clock signal comes for next cycle.

The output voltage is sensed by a resistor divider from VOUT to FB

pin. The difference between FB voltage and 0.8V reference is

amplified and compensated to generate the error voltage signal at

COMP pin. Then the COMP pin signal is compared with the current

ramp signal to shut down the PWM.

PFM Mode Operation

To pull the MODE pin HIGH (>2.5V) or leave the MODE pin floating

will set the IC to have PFM (Pulse Frequency Modulation) operation

in light load. In PFM mode, the switching frequency is dramatically

reduced to minimize the switching loss. The ISL85402 enters PFM

mode when the MOSFET peak current is lower than the PWM/PFM

boundary current threshold. This threshold is 700mA as default

when there is no programming resistor at MODE pin.

The current threshold for PWM/PFM boundary can be

programmed by choosing the MODE pin resistor value calculated

from Equation 2, where IPFM is the desired PWM/PFM boundary

current threshold and RMODE is the programming resistor.

RMODE

=

------1-----1-----8-----5-----0-----0--------

IPFM + 0.2

(EQ. 2)

12

FN7640.0

September 29, 2011

Share Link: