KSZ8993M データシートの表示（PDF） - Micrel

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KSZ8993M

Integrated 3-Port 10/100 Managed Switch with PHYs

Micrel 

Micrel, Inc.

KSZ8993M/ML

Pin Number

88

89

Pin Name

SCONF1

SCONF0

90

DGND

91

VDDC

92

PRSEL1

93

PRSEL0

Type (1)

Ipd

Ipd

Gnd

P

Ipd

Ipd

Description

Switch MII interface configuration

(SCONF1, SCONF0) Description

(0,0)

disable, outputs tri-stated

(0,1)

PHY mode MII

(1,0)

MAC mode MII

(1,1)

PHY mode SNI

Digital ground

1.8V digital VDD

Priority select. Select queue servicing if using split queues.

Use the table below to select the desired servicing. Note that

this selection effects all split transmit queue ports in the same

way.

(PRSEL1, PRSEL0) Description

(0,0)

Transmit all high priority before low

priority

(0,1)

Transmit high priority and low priority at

10:1 ratio.

(1,0)

Transmit high priority and low priority at

5:1 ratio.

(1,1)

Transmit high priority and low priority at

2:1 ratio.

94

MDC

Ipu

MII management interface: clock input

95

MDIO

Ipu/O

MII management interface: data input/output

Note: an external 4.7K pull-up is needed on this pin when it is

in use.

96

SPIQ

Opu

SPI slave mode: serial data output

See description in pins 100 and 101.

97

SCL

Ipu/O

SPI slave mode / I2C slave mode: clock input

I2C master mode: clock output

See description in pins 100 and 101.

98

SDA

Ipu/O

SPI slave mode: serial data input

I2C master/slave mode: serial data input/output

See description in pins 100 and 101.

99

SPIS_N

Ipu

SPI slave mode: chip select (active low)

When SPIS_N is high, the KSZ8993M is deselected and

SPIQ is held in high impedance state.

A high-to-low transition is used to initiate SPI data transfer.

See description in pins 100 and 101.

Note:

1. P = Power supply.

Gnd = Ground.

Ipu = Input w/ internal pull-up.

Ipd = Input w/ internal pull-down.

Ipu/O = Input w/ internal pull-up during reset, output pin otherwise.

Opu = Output w/ internal pull-up.

October 2008

15

M9999-020606

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