KSZ8995X データシートの表示（PDF） - Micrel

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KSZ8995X

Integrated 5-Port 10/100 QoS Switch

Micrel 

KS8995X

Micrel

KS8995X

Integrated 5-Port 10/100 QoS Switch

Rev. 1.13

General Description

The KS8995X is a highly integrated Layer-2 QoS (Quality of

Service) switch with optimized BOM (Bill of Materials) cost for

low port count, cost-sensitive 10/100Mbps switch systems. It

also provides an extensive feature set including three differ-

ent QoS priority schemes, a dual MII interface for BOM cost

reduction, rate limiting to offload CPU tasks, software and

hardware power-down, a MDC/MDIO control interface and

port mirroring/monitoring to effectively address both current

and emerging Fast Ethernet applications.

The KS8995X contains five 10/100 transceivers with pat-

ented mixed-signal low-power technology, five MAC (Media

Access Control) units, a high-speed non-blocking switch

fabric, a dedicated address lookup engine, and an on-chip

frame buffer memory.

All PHY units support 10BaseT and 100BaseTX. In addition,

two of the PHY units support 100BaseFX (Ports 4 and 5).

All support documentation can be found on Micrel’s web site

at www.micrel.com.

Features

• Integrated switch with five MACs and five Fast Ethernet

transceivers fully compliant to IEEE 802.3u standard

• Shared memory based switch fabric with fully non-

blocking configuration

• 10BaseT, 100BaseTX and 100BaseFX modes (FX in

Ports 4 and 5)

• Dual MII configuration: MII-Switch (MAC or PHY mode

MII) and MII-P5 (PHY mode MII)

• VLAN ID tag/untag options, per-port basis

• Enable/disable option for huge frame size up to 1916

bytes per frame

• Broadcast storm protection with percent control – global

and per-port basis

• Optimization for fiber-to-copper media conversion

• Full-chip hardware power-down support (register

configuration not saved)

• Per-port-based software power-save on PHY (idle link

detection, register configuration preserved)

• QoS/CoS packets prioritization supports: per port,

802.1p and DiffServ based

Functional Diagram

Auto

MDI/MDIX

Auto

MDI/MDIX

Auto

MDI/MDIX

Auto

MDI/MDIX

Auto

MDI/MDIX

MII-P5

MDC, MDI/O

MII-SW or SNI

LED0[5:1]

LED1[5:1]

LED2[5:1]

10/100

T/Tx 1

10/100

T/Tx 2

10/100

T/Tx 3

10/100

T/Tx/Fx 4

10/100

T/Tx/Fx 5

LED I/F

10/100

MAC 1

10/100

MAC 2

10/100

MAC 3

10/100

MAC 4

10/100

MAC 5

SNI

Control

Registers

1K look-up

Engine

Queue

Mgmnt

Buffer

Mgmnt

Frame

Buffers

EEPROM

I/F

Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com

December 2003

1

M9999-120403

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