Pin connection
2
Pin connection
Figure 2. Pin connection (Top view)
LIN
SD
HIN
VCC
DIAG
CIN
SGND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
D97IN521A
Vboot
HVG
OUT
N.C.
N.C.
LVG
PGND
L6386AD
Table 4. Pin description
N°
Pin Type
Function
1
LIN
I Low-side driver logic input
2
SD(1) I Shut down logic input
3
HIN
I High-side driver logic input
4
VCC
Low voltage supply
5
DIAG O Open drain diagnostic output
6
CIN
I Comparator input
7 SGND
Ground
8 PGND
Power ground
9 LVG (1) O Low-side driver output
10, 11 N.C.
Not connected
12 OUT O High-side driver floating driver
13 HVG (1) O High-side driver output
14
Vboot
Bootstrapped supply voltage
1. The circuit guarantees 0.3V maximum on the pin (@ Isink = 10 mA), with VCC >3V. This allows to omit the
"bleeder" resistor connected between the gate and the source of the external MOSFET normally used to
hold the pin low; the gate driver assures low impedance also in SD condition.
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