LA76832N データシートの表示（PDF） - SANYO -> Panasonic

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LA76832N

I2C Bus Control IC

SANYO -> Panasonic 

LA76832N

Parameter

[VIF block]

Maximum RF AGC voltage

Minimum RF AGC voltage

RF AGC Delay Pt

(@DAC = 0)

RF AGC Delay Pt

(@DAC = 63)

Input sensitivity

Symbol

Test

point

Input

signal

VRFH

VRFL

RFAGC0

RFAGC63

Vi

4

SG1

80dBµ

4

SG1

80dBµ

SG1

4

SG1

4

SG6

46

No-signal video output

voltage

Sync signal tip level

Video output amplitude

Video S/N

C-S beat level

VOn

VOtip

VO

S/N

IC-S

No signal

46

46

SG1

80dBµ

46

SG6

80dBµ

46

SG1

80dBµ

SG1

46

SG2

SG3

Differential gain

Differential phase

Maximun AFT

output voltage

Minimun AFT

output voltage

AFT detection sensitivity

DG

DP

VAFTH

VAFTL

VAFTS

SG5

46

80dBµ

46

SG5

80dBµ

10

SG4

80dBµ

SG4

10

80dBµz

SG4

10

80dBµz

APC pull-in range (U), (L)

fPU, fPL

SG4

46

80dBµ

Test method

Bus conditions

Measure the DC voltage at pin 4.

RF. AGC = ”000000”

Measure the DC voltage at pin 4.

RF. AGC = ”111111”

Obtain the input level at which the DC voltage at

pin 4 becomes 4.5V.

Obtain the input level at which the DC voltage at

pin 4 becomes 4.5V.

Using an oscilloscope, observe the level at pin

46 and obtain the input level at which the

waveform's p-p value becomes 1.4Vp-p.

Set IF AGC = “1” and measure the DC voltage at

pin 46.

Measure the DC voltage at pin 46.

RF. AGC = ”000000”

RF. AGC = ”111111”

Using an oscilloscope, observe the level at pin

46 and measure the waveform’s p-p value.

Measure the noise voltage (Vsn) at pin 46 with

an RMS voltmeter through a 10kHz to 4.2MHz

band-pass filter and calculate 20Log (1.43/Vsn).

Input a 80dBµ SG1 signal and measure the

DC voltage (V3) at pin 3. Mix SG1 = 74dBµ,

SG2 = 64dBµ, and SG3 = 64dBµ to enter the

mixture in the VIF IN. Apply V3 to pin 3 from an

external DC power supply. Using a spectrum

analyzer, measure the difference between pin

46’s 3.58MHz component and 920MHz

component.

Using a vector scope, measure the level at

Pin 46.

Using a vector scope, measure the level at

Pin 46.

Set and input the SG4 frequency to 44.75MHz to

be input. Measure the DC voltage at pin 10 at

that moment.

Set and input the SG4 frequency to 46.75MHz to

be input. Measure the DC voltage at pin 10 at

that moment.

Adjust the SG4 frequency and measure

frequency deviation ∆f when the DC voltage at

pin 10 changes from 1.5V to 3.5V.

VAFTS = 2000/∆f [mV/kHz]

Connect an oscilloscope to pin 46 and adjust the

SG4 frequency to a frequency higher than

45.75MHz to bring the PLL into unlocked mode.

(A beat signal appears.) Lower the SG4

frequency and measure the frequency at which

the PLL locks again. In the same manner, adjust

the SG4 frequency to a lower frequency to bring

the PLL into unlocked mode. Lower the SG4

frequency and measure the frequency at which

the PLL locks again.

No.0069-8/39

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