LC74731 データシートの表示（PDF） - SANYO -> Panasonic
部品番号
コンポーネント説明
メーカー
LC74731 Datasheet PDF : 38 Pages
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LC74731W,74732W
COMMAND51 (Sync signal detection 2 setup command)
• First byte
DA0 to 7
7
6
5
4
3
2
1
Register
—
—
—
—
—
—
MUT1
0
MUT0
State
1
1
0
1
0
1
0
1
0
1
Content
Function
Command 5 identification code
Display control settings
Extended command 1 identification code
MUT1 MUT0 Output
0
0 CSYNC
0
1 PE
1
0 A0-17 “Z”
Notes
Video signal output muting function selection
Valid when the MUTE pin is low.
• Second byte
DA0 to 7
7
6
Register
—
—
5
RNE0
4
SJNS3
3
SJNS2
2
SJNS1
1
SJCS1
0
SJCS0
State
0
0
0
1
0
1
0
1
0
1
0
1
0
1
Content
Function
Second byte identification bit
Sync signal no signal to signal present discrimination - Normal
values
Sync signal no signal to signal present discrimination - Values
shown in parentheses
SJNS3 SJNS2 SJNS1 Times
0
0
0
None
0
0
1
4
0
1
0
8
0
1
1
16
1
0
0
32
1
0
1
64
1
1
0
128
1
1
1
256
SJCS1 SJCS0 PAL
NTSC
0
0
677 ns (1/3)
558 ns (1/2)
0
1
903 ns (1/4)
838 ns (1/3)
1
0
450 ns (1/2)
1117 ns (1/4)
Note that all registers are set to 0 when these ICs are reset by the RST pin.
Notes
Changes the judgment criterion values for sync
signal recognition for the no signal to signal
present transition. (COM50)
Noise ignoring circuit setting for sync signal
recognition for the no signal to signal present
transition
If more than the number of horizontal signals
shown at the left are input during a 1H period, the
circuit recognizes a no signal state.
Synchronization discrimination
Selects the clock used to delimit the HSYNI signal.
No. 6526-21/38
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