LH79520 データシートの表示（PDF） - NXP Semiconductors.

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LH79520

System-on-Chip

NXP Semiconductors. 

System-on-Chip

NXP Semiconductors

LH79520

Table 4. LCD Data Multiplexing

STN

PIN LCD DATA MONO 4-BIT

NO. SIGNAL

SINGLE DUAL

PANEL PANEL

MONO 8-BIT

SINGLE DUAL

PANEL PANEL

COLOR

ALL TFT: ALL TFT:

5:5:5+I

SINGLE DUAL

5:6:5

PANEL PANEL

130 LCDVD17

BLUE4 BLUE3

132 LCDVD16

BLUE3 BLUE2

139 LCDVD15

MLSTN7

CLSTN7 BLUE2 BLUE1

140 LCDVD14

MLSTN6

CLSTN6 BLUE1 BLUE0

141 LCDVD13

MLSTN5

CLSTN5 BLUE0 GREEN5

142 LCDVD12

MLSTN4

CLSTN4

114 LCDVD11

MLSTN3

MLSTN3

CLSTN3 GREEN4 GREEN4

115 LCDVD10

MLSTN2

MLSTN2

CLSTN2 GREEN3 GREEN3

116 LCDVD9

MLSTN1

MLSTN1

CLSTN1 GREEN2 GREEN2

117 LCDVD8

MLSTN0

MLSTN0

CLSTN0 GREEN1 GREEN1

118 LCDVD7

MUSTN7 MUSTN7 CUSTN7 CUSTN7 GREEN0 GREEN0

119 LCDVD6

MUSTN6 MUSTN6 CUSTN6 CUSTN6

121 LCDVD5

MUSTN5 MUSTN5 CUSTN5 CUSTN5 RED4 RED4

122 LCDVD4

MUSTN4 MUSTN4 CUSTN4 CUSTN4 RED3 RED3

123 LCDVD3 MUSTN3 MUSTN3 MUSTN3 MUSTN3 CUSTN3 CUSTN3 RED2 RED2

124 LCDVD2 MUSTN2 MUSTN2 MUSTN2 MUSTN2 CUSTN2 CUSTN2 RED1 RED1

126 LCDVD1 MUSTN1 MUSTN1 MUSTN1 MUSTN1 CUSTN1 CUSTN1 RED0 RED0

127 LCDVD0 MUSTN0 MUSTN0 MUSTN0 MUSTN0 CUSTN0 CUSTN0 Intensity6 BLUE4

NOTES:

1. The Intensity bit is identically generated for all three colors.

2. MUSTN = Monochrome Upper data bit for STN panel.

3. MLSTN = Monochrome Lower data bit for STN panel.

4. CUSTN = Color Upper data bit for STN panel.

5. CLSTN = Color Lower data bit for STN panel.

6. Connect to the LSB of the Red, Green, and Blue inputs of a 6:6:6 panel.

7. Recommended hookups for TFT 5:5:5 + Intensity and 5:6:5 are shown.

This wiring requires the BGR bit in the LCD Control Register to be 0.

ALL TFT:

PALETTE

DATA OR

16-BIT

DIRECT

BIT 14

BIT 13

BIT 12

BIT 11

BIT 10

BIT 9

BIT 8

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

BIT 15

Table 5. LCD Control and Timing Signals

PIN

STN AND

TFT

AD-TFT,

HR-TFT

DESCRIPTION

119

LCDPS Power Save (AD-TFT, HR-TFT only)

129

LCDFP

LCDSPS Frame Pulse (STN), Vertical Synchronization Pulse (TFT) /Row Display Reset

131

LCDLP

LCDLP Line Synchronization Pulse (STN), Horizontal Synchronization Pulse (TFT)

133 LCDDCLK LCDDCLK Panel Data Clock

134 LCDDCLKIN LCDDCLKIN External Clock Input

135 LCDVDDEN LCDCLS Digital Supply Enable/Gate Driver Clock

137 LCDENAB

LCDSPL Data Enable/ Line Start Pulse (Left)

142

LCDREV Reverse Signal (AD-TFT, HR-TFT only)

Preliminary data sheet

Rev. 01 — 16 July 2007

15

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