LT3682EDD データシートの表示（PDF） - Linear Technology

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LT3682EDD

1A Micropower Step-Down Switching Regulator

Linear Technology 

LT3682

APPLICATIONS INFORMATION

capacitor on the VC pin (CC) integrates the error amplifier

output current, resulting in two poles in the loop. In most

cases a zero is required and comes from either the output

capacitor ESR or from a resistor RC in series with CC.

This simple model works well as long as the value of the

inductor is not too high and the loop crossover frequency

is much lower than the switching frequency. A phase lead

capacitor (CPL) across the feedback divider may improve

the transient response. Figure 3 shows the transient

response when the load current is stepped from 300mA

to 650mA and back to 300mA.

VOUT

100mV/DIV

ILOAD

0.5A/DIV

20μs/DIV

3682 F03

Figure 3. Transient Load Response of the LT3682.

3.3VOUT Typical Application with VIN = 12V as the

Load Current is Stepped from 300mA to 650mA.

Low Ripple Burst Mode and Pulse-Skip Mode

The LT3682 is capable of operating in either Low Ripple Burst

Mode or Pulse-Skip Mode which are selected using the SYNC

pin. See the Synchronization section for more information.

To enhance efficiency at light loads, the LT3682 can be

operated in Low Ripple Burst Mode operation which keeps

the output capacitor charged to the proper voltage while

minimizing the input quiescent current. During Burst Mode

operation, the LT3682 delivers single cycle bursts of current

to the output capacitor followed by sleep periods where

the output power is delivered to the load by the output

capacitor. Because the LT3682 delivers power to the output

with single, low current pulses, the output ripple is kept

below 15mV for a typical application. In addition, VIN and

BD quiescent currents are reduced to typically 35μA and

55μA respectively during the sleep time. As the load current

decreases towards a no load condition, the percentage of

time that the LT3682 operates in sleep mode increases and

the average input current is greatly reduced resulting in

high efficiency even at very low loads. (See Figure 4). At

higher output loads (above about 70mA for the front page

application) the LT3682 will be running at the frequency

programmed by the RT resistor, and will be operating in

standard PWM mode. The transition between PWM and

Low Ripple Burst Mode is seamless, and will not disturb

the output voltage.

If low quiescent current is not required, tie SYNC high to

select pulse-skip mode. The benefit of this mode is that the

LT3682 will enter full frequency standard PWM operation at

a lower output load current than when in Burst Mode. The

front page application circuit will switch at full frequency

at output loads higher than about 30mA. The maximum

load current that the LT3682 can supply is reduced when

SYNC is high.

VSW

5V/DIV

IL

0.2A/DIV

VOUT

20mV/DIV

5μs/DIV

VIN = 12V; FRONT PAGE APPLICATION

ILOAD = 5mA

3682 F04

Figure 4. Burst Mode Operation

3682f

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