LCX020BK データシートの表示（PDF） - Sony Semiconductor

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LCX020BK

1.8cm (0.7-inch) Color LCD Panel

Sony Semiconductor 

LCX020BK

2. LCD Panel Operations

[Description of basic operations]

• A vertical driver, which consists of vertical shift registers, enable-gates and buffers, applies a selected pulse

to every 624 gate lines sequentially in every single horizontal scanning period. (in Macintosh16 mode)

• A horizontal driver, which consists of horizontal shift registers, gates and CMOS sample-and-hold circuits,

applies selected pulses to every 2496 signal electrodes sequentially in a single horizontal scanning period.

These pulses are used to supply the sampled video signal to the row signal lines.

• Vertical and horizontal shift registers address one pixel, and then Thin Film Transistors (TFTs; two TFTs for

one dot) turn on to apply a video signal to the dot. The same procedures lead to the entire 2496 × 832 dots to

display a picture in a single vertical scanning period.

• The data and video signals shall be input with polarity-inverted system in every horizontal cycle.

[Description of operating mode]

The LCD panel can change the angle of view by displaying a black frame to support various signal systems.

The angle of view is switched by MODE1, 2 and 3. However, the picture center does not change. The angle of

view mode settings are shown below.

MODE1

L

L

L

L

H

H

MODE2

L

L

H

H

L

L

MODE3

L

H

L

H

L

H

Display mode

Macintosh16: 832 × 624

SVGA: 800 × 600

PAL: 762 × 572

VGA/NTSC: 640 × 480

PC98: 640 × 400

WIDE: 832 × 480

The LCD panel has the following functions to easily apply to various uses, as well as various signal systems.

• Right/left inverse mode

• Up/down inverse mode

These modes are controlled by two signals (RGT and DWN). The right/left and up/down mode settings are

shown in the tables below.

RGT

H

L

Mode

Right scan

Left scan

DWN

H

L

Mode

Down scan

Up scan

Right/left and up/down mean the direction when the Pin 1 marking is located at the right side with the pin block

facing upward.

Since the display area is located in the center of the panel in each mode, the start pulse, clock phase and

polarity for both the H and V systems must be varied. The phase relationship between the start pulse and the

clock for each mode is shown on the following pages.

– 17 –

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