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LTC2924C(RevA) データシートの表示(PDF) - Linear Technology

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LTC2924C
(Rev.:RevA)
Linear
Linear Technology Linear
LTC2924C Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
U
OPERATIO
PS1
VPS1(ON)
LTC2924
PS3
VPS3(ON)
0V
TMR*
ON
VPS2(ON)
PS2
PS4
VPS4(ON)
VPS4(OFF)
VPS3(OFF)
VPS2(OFF)
VPS1(OFF)
DONE *TMR IS CAPACITOR ADJUSTABLE
2924 F01
Figure 1. Power On and Power Off Sequence for Four Supplies
The LTC2924 is a power supply sequencer designed for
ON
0.61V
use with external N-channel MOSFETs or power supplies
with shutdown pins. Four power supplies can be fully se- TMR
1V
quenced by a single LTC2924 (see Figure 1). An internally
regulated charge pump provides (VCC + 5V) gate voltages OUT1
for driving external logic-level and sub-logic level MOS-
FETs. Adding a single capacitor enables an adjustable time IN1
0.61V
delay between power supplies during both Power On and
Power Off sequencing. A second capacitor can be added OUT2
to enable a power good timer which detects the failure of
any power supply to turn on within the set time.
IN2
0.61V
The ON pin signal is used to command the LTC2924
to start the Power On and Power Down sequences. To OUT3
command the Power On sequence, the ON pin is pulled
IN3
above 0.61V by a system controller or a resistive divider
from a power supply. A voltage comparator senses the OUT4
ON command and signals the sequencing logic to start
the Power On sequence.
IN4
0.61V
0.61V
When the Power On sequence starts, the TMR grounding
switch is released and a 5µA current source charges an DONE
external capacitor, CTMR (see Figure 2). When the voltage
on this capacitor exceeds 1V, a comparator signals the
2924 F02
Figure 2. On Sequence for Four Supplies
2924fa
7

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