LTC3406AB データシートの表示（PDF） - Linear Technology

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LTC3406AB

1.5MHz, 600mA Synchronous Step-Down Regulator in ThinSOT

Linear Technology 

LTC3406AB

operation (Refer to Functional Diagram)

Main Control Loop

The LTC3406AB uses a constant frequency, current

mode step-down architecture. Both the main (P-channel

MOSFET) and synchronous (N-channel MOSFET) switches

are internal. During normal operation, the internal top power

MOSFET is turned on each cycle when the oscillator sets

the RS latch, and turned off when the current comparator,

ICOMP, resets the RS latch. The peak inductor current at

which ICOMP resets the RS latch, is controlled by the output

of error amplifier EA. When the load current increases,

it causes a slight decrease in the feedback voltage, FB,

relative to the 0.6V reference, which in turn, causes the

EA amplifier’s output voltage to increase until the average

inductor current matches the new load current. While the

top MOSFET is off, the bottom MOSFET is turned on until

either the inductor current starts to reverse, as indicated

by the current reversal comparator IRCMP, or the beginning

of the next clock cycle.

The main control loop is shut down by grounding RUN,

resetting the internal soft-start. Re-enabling the main

control loop by pulling RUN high activates the internal

soft-start, which slowly ramps the output voltage over

approximately 0.9ms until it reaches regulation.

Pulse Skipping Mode Operation

At light loads, the inductor current may reach zero or

reverse on each pulse. The bottom MOSFET is turned off

by the current reversal comparator, IRCMP, and the switch

voltage will ring. This is discontinuous mode operation,

and is normal behavior for the switching regulator. At very

light loads, the LTC3406AB will automatically skip pulses

in pulse skipping mode operation to maintain output regu-

lation. Refer to the LTC3406A data sheet if Burst Mode

operation is preferred.

Dropout Operation

As the input supply voltage decreases to a value approach-

ing the output voltage, the duty cycle increases toward the

maximum on-time. Further reduction of the supply voltage

forces the main switch to remain on for more than one

cycle until it reaches 100% duty cycle. The output voltage

will then be determined by the input voltage minus the volt-

age drop across the P-channel MOSFET and the inductor.

An important detail to remember is that at low input supply

voltages, the RDS(ON) of the P-channel switch increases

(see Typical Performance Characteristics). Therefore,

the user should calculate the power dissipation when the

LTC3406AB is used at 100% duty cycle with low input

voltage (See Thermal Considerations in the Applications

Information section).

Slope Compensation and Inductor Peak Current

Slope compensation provides stability in constant fre-

quency architectures by preventing subharmonic oscilla-

tions at high duty cycles. It is accomplished internally by

adding a compensating ramp to the inductor current signal

at duty cycles in excess of 40%. Normally, this results in

a reduction of maximum inductor peak current for duty

cycles >40%. However, the LTC3406AB uses a patented

scheme that counteracts this compensating ramp, which

allows the maximum inductor peak current to remain

unaffected throughout all duty cycles.

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For more information www.linear.com/LTC3406AB

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