LTC3520
APPLICATIONS INFORMATION
Capacitor Vendor Information
Both the input and output capacitors used with the LTC3520
must be low ESR and designed to handle the large AC cur-
rents generated by switching converters. The vendors in
Table 4 provide capacitors that are well suited to LTC3520
application circuits.
Table 4. Capacitor Vendor Information
MANUFACTURER WEB SITE
Taiyo Yuden
www.t-yuden.com
TDK
www.component.tdk.com
Sanyo
Murata
www.secc.co.jp
www.murata.com
PART NUMBER
JMK212BJ226MG-T
22μF, 6.3V
C3216X5ROJ106KB
10μF, 6.3V
6APD10M 10μF, 6.3V
GRM21BR60J226ME39
22μF, 6.3V
Closing the Buck-Boost Feedback Loop
The LTC3520 buck-boost converter employs voltage mode
PWM control. The control to output gain varies with opera-
tional region (buck, boost, or buck-boost), but is usually
no greater than 24dB. The output filter exhibits a double
pole response as given by the following equations:
1
f FILTER_POLE = 2π
Hz(Buck Mode)
LCOUT
where L is the inductance in henries and COUT is the output
capacitance in farads. The output filter zero is given by:
f FILTER_ ZERO
=
1
2πRESR COUT
Hz
where RESR is the equivalent series resistance of the output
capacitor. A challenging aspect of the loop dynamics in
boost mode is the presence of a right half plane zero at
the frequency given by:
f RHPZ
=
VIN2
2πIOUT LVOUT
Hz
The loop gain is typically rolled off to below unity gain
before the worst case right half plane zero frequency.
A simple Type I compensation network as shown in
Figure 6 can be utilized to stabilize the buck-boost
converter. However, this will yield a relatively low band-
width and slow transient response. To ensure sufficient
phase margin using Type I compensation, the loop must
be crossed over a decade before the LC double pole fre-
quency. The unity-gain frequency of the error amplifier
with Type I compensation is given by:
1
f UG = 2πR1CP1 Hz
f FILTER_POLE
=
1
2π VOUT
LCOUT
Hz(Boost Mode)
0.782V
FB1
18
VOUT
R1
VC1
CP1
15
R2
3520 F06
Figure 6. Type I Compensation Network
3520fa
18