M25P05-A
Instructions
Table 7. Protection modes
W SRWD
signal bit
Mode
Write protection of the status
register
Memory content
Protected
area(1)
Unprotected
area(1)
1
0
Status register is writable (if the Protected
Ready to
0
0
Software WREN instruction has set the WEL against page accept page
protected bit).
program, sector program and
1
1
(SPM) The values in the SRWD, BP1 and erase and bulk sector erase
BP0 bits can be changed
erase
instructions
Status register is hardware write Protected
Ready to
Hardware protected.
against page accept page
0
1 protected
program, sector program and
(HPM) The values in the SRWD BP1 and erase and bulk sector erase
BP0 bits cannot be changed
erase
instructions
1. As defined by the values in the block protect (BP1, BP0) bits of the status register, as shown in Table 2.
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