HN29V51211T-50 データシートの表示（PDF） - Hitachi -> Renesas Electronics

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HN29V51211T-50

512M AND type Flash Memory More than 32,113-sector (542,581,248-bit)

Hitachi -> Renesas Electronics 

HN29V51211 Series

Parameter

Symbol Min Typ Max Unit Test conditions

Notes

SC setup for WE

CE hold time for OE

t SW

50

—

—

ns

t COH

0

—

—

ns

SA (2) to CA (2) delay time tSCD

RDY/Busy setup for SC

t RS

—

—

30

µs

200 —

—

ns

Time to device busy

t DB

—

—

150 ns

Busy time on reset mode

t RBSY

—

45

—

µs

Notes: 1. tDF is a time after which the I/O pins become open.

2. tWSD (min) is specified as a reference point only for SC, if tWSD is greater than the specified tWSD (min)

limit, then access time is controlled exclusively by tSAC.

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