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M29W400 データシートの表示(PDF) - STMicroelectronics

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M29W400 Datasheet PDF : 34 Pages
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M29W400T, M29W400B
Table 16B. Write AC Characteristics, Chip Enable Controlled
(TA = 0 to 70°C, –20 to 85°C or –40 to 85°C)
M29W400T / M29W400B
Symbol Alt
Parameter
-120
VCC = 2.7V to 3.6V
Min
Max
-150
VCC = 2.7V to 3.6V
Min
Max
tAVAV
tWC Address Valid to Next Address Valid
120
150
tWLEL
tWS Write Enable Low to Chip Enable Low
0
0
tELEH
tCP Chip Enable Low to Chip Enable High
50
50
tDVEH
tDS Input Valid to Chip Enable High
50
50
tEHDX
tDH Chip Enable High to Input Transition
0
0
tEHWH
tWH Chip Enable High to Write Enable High
0
0
tEHEL
tCPH Chip Enable High to Chip Enable Low
30
35
tAVEL
tAS Address Valid to Chip Enable Low
0
0
tELAX
tAH Chip Enable Low to Address Transition
50
50
tGHEL
Output Enable High Chip Enable Low
0
0
tVCHWL
tVCS VCC High to Write Enable Low
50
50
tEHGL
tOEH Chip Enable High to Output Enable Low
0
0
tPHPHH (1,2) tVIDR RP Rise TIme to VID
500
500
tPLPX
tEHRL (1)
tPHWL (1)
tRP
tBUSY
tRSP
RP Pulse Width
Program Erase Valid to RB Delay
RP High to Write Enable Low
500
500
90
90
4
4
Notes: 1. Sample only, not 100% tested.
2. This timing is for Temporary Block Unprotection operation.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
µs
Erase Resume (ER) Instruction. If an Erase Sus-
pend instruction was previously executed, the
erase operation may be resumed by giving the
command 30h, at any address, and without any
Coded cycles.
POWER SUPPLY
Power Up
The memory Command Interfaceis reset on power
up to Read Array. Either E or W must be tied to VIH
during Power Up to allow maximum security and
the possibility to write a command on the first rising
edge of E and W. Any write cycle initiation is
blocked when Vcc is below VLKO.
Supply Rails
Normal precautions must be taken for supply volt-
age decoupling; each device in a system should
have the VCC rail decoupled with a 0.1µF capacitor
close to the VCC and VSS pins. The PCB trace
widths should be sufficient to carry the VCC pro-
gram and erase currents required.
21/34

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