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M36DR432CZA データシートの表示(PDF) - STMicroelectronics

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M36DR432CZA Datasheet PDF : 46 Pages
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M36DR432C, M36DR432D
POWER CONSUMPTION
Power Down
The memory provides Reset/Power Down control
input RPF. The Power Down function can be acti-
vated only if the relevant Configuration Register bit
is set to '1'. In this case, when the RPF signal is
pulled at VSS the supply current drops to typically
ICC2 (see Table 24), the memory is deselected and
the outputs are in high impedance.If RPF is pulled
to VSS during a Program or Erase operation, this
operation is aborted in tPLQ7V and the memory
content is no longer valid (see Reset/Power Down
input description).
Power Up
The memory Command Interface is reset on Pow-
er-Up to Read Array. Either EF or WF must be tied
to VIH during Power-Up to allow maximum security
and the possibility to write a command on the first
rising edge of WF.
During Power-Up RPF must remain low for at least
50µs after VDD is applied, to allow correct initializa-
tion of the CPU.
Supply Rails
Normal precautions must be taken for supply volt-
age decoupling; each device in a system should
have the VDDF rails decoupled with a 0.1µF capac-
itor close to the VDDF and VSS pins. The PCB trace
widths should be sufficient to carry the required
VDDF program and erase currents.
18/46

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