M37510M1FP データシートの表示（PDF） - MITSUBISHI ELECTRIC

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M37510M1FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI ELECTRIC  

b7

b0 Serial I/O status register

b7

(SIO1STS : address 001916)

(SIO2STS : address 003116)

Transmit buffer empty flag (TBE)

0 : Buffer full

1 : Buffer empty

Receive buffer full flag (RBF)

0 : Buffer empty

1 : Buffer full

Transmit shift completion flag (TSC)

0 : Transmit shift in progress

1 : Transmit shift completed

Overrun error flag (OE)

0 : No error

1 : Overrun error

Parity error flag (PE)

0 : No error

1 : Parity error

Framing error flag (FE)

0 : No error

1 : Framing error

Summing error flag (SE)

0 : (OE) U (PE) U (FE) = 0

1 : (OE) U (PE) U (FE) = 1

Not used (returns “1” when read)

b7

Contents in

b0 UART control register

(UART1CON : address 001B 16)

(UART2CON : address 003316)

Character length selection bit (CHAS)

0 : 8 bits

1 : 7 bits

Parity enable bit (PARE)

0 : Parity checking disabled

1 : Parity checking enabled

Parity selection bit (PARS)

0 : Even parity

1 : Odd parity

Stop bit length selection bit (STPS)

0 : 1 stop bit

1 : 2 stop bits

P45/TXD1 P-channel output disable bit (POFF)

P31/TXD2 P-channel output disable bit

0 : CMOS output (in output mode)

1 : N-channel open-drain output

(in output mode)

Not used (return “1” when read)

are for serial I/O2.

Fig. 17 Structure of serial I/O control registers

MITSUBISHI MICROCOMPUTERS

7510 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

b0 Serial I/O control register

(SIO1CON : address 001A16)

(SIO2CON : address 003216)

BRG count source selection bit (CSS)

0 : f(XIN)

1 : f(XIN) divided by 4

Serial I/O synchronous clock selection bit (SCS)

0 : BRG output divided by 4 when clock

synchronous serial I/O is selected,

BRG output divided by 16 when UART

is selected.

1 : External clock input when clock synchronous

serial I/O is selected, external clock input

divided by 16 when UART is selected.

SRDY output enable bit (SRDY)

0 : P47 P33 pin operates as ordinary I/O pin

1 : P47 P33 pin operates as SRDY output pin

Transmit interrupt source selection bit (TIC)

0 : Interrupt when transmit buffer has emptied

1 : Interrupt when transmit shift operation

is completed

Transmit enable bit (TE)

0 : Transmit disabled

1 : Transmit enabled

Receive enable bit (RE)

0 : Receive disabled

1 : Receive enabled

Serial I/O mode selection bit (SIOM)

0 : Asynchronous serial I/O (UART)

1 : Clock synchronous serial I/O

Serial I/O enable bit (SIOE)

0 : Serial I/O disabled

(pins P44 to P47 P30 to P33

operate as ordinary I/O pins)

1 : Serial I/O enabled

(pins P44 to P47 P30 to P33

operate as serial I/O pins)

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