M50FW040N(2006) データシートの表示（PDF） - STMicroelectronics

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M50FW040N
(Rev.:2006)

4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory

STMicroelectronics 

Firmware hub (FWH) interface Configuration Registers

M50FW040

6

Firmware hub (FWH) interface Configuration

Registers

When the Firmware Hub Interface is selected several additional registers can be accessed.

These registers control the protection status of the Blocks, read the General Purpose Input

pins and identify the memory using the Electronic Signature codes. See Table 9 for the

memory map of the Configuration Registers.

6.1

6.1.1

6.1.2

Lock Registers

The Lock Registers control the protection status of the Blocks. Each Block has its own Lock

Register. Three bits within each Lock Register control the protection of each block, the Write

Lock Bit, the Read Lock Bit and the Lock Down Bit.

The Lock Registers can be read and written, though care should be taken when writing as,

once the Lock Down Bit is set, ‘1’, further modifications to the Lock Register cannot be made

until cleared, to ‘0’, by a reset or power-up.

See Table 10 for details on the bit definitions of the Lock Registers.

Write Lock

The Write Lock Bit determines whether the contents of the Block can be modified (using the

Program or Erase Command). When the Write Lock Bit is set, ‘1’, the block is write

protected; any operations that attempt to change the data in the block will fail and the Status

Register will report the error. When the Write Lock Bit is reset, ‘0’, the block is not write

protected through the Lock Register and may be modified unless write protected through

some other means.

When VPP is less than VPPLK all blocks are protected and cannot be modified, regardless of

the state of the Write Lock Bit. If Top Block Lock, TBL, is Low, VIL, then the Top Block (Block

7) is write protected and cannot be modified. Similarly, if Write Protect, WP, is Low, VIL, then

the Main Blocks (Blocks 0 to 6) are write protected and cannot be modified.

After power-up or reset the Write Lock Bit is always set to ‘1’ (write protected).

Read Lock

The Read Lock bit determines whether the contents of the Block can be read (from Read

mode). When the Read Lock Bit is set, ‘1’, the block is read protected; any operation that

attempts to read the contents of the block will read 00h instead. When the Read Lock Bit is

reset, ‘0’, read operations in the Block return the data programmed into the block as

expected.

After power-up or reset the Read Lock Bit is always reset to ‘0’ (not read protected).

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