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M58MR016CZC データシートの表示(PDF) - STMicroelectronics

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M58MR016CZC Datasheet PDF : 51 Pages
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M58MR016C, M58MR016D
Table 11. Instructions
Instruction Cyc. Operation Address(1,2) Data (3) Operation Address(1,2) Data (3)
RD
Read Memory
Array
1+
Write
BKA
FFh
Read (1)
Read
Address
Data
RSR
Read Status
Register
1+
Write
BKA
70h
Read (1)
BKA
Status
Register
Read
RSIG Electronic
1+ Write
EA
90h
Read (1)
EA
ED
Signature
RCFI Read CFI
1+ Write
CFIA
98h
Read (1)
CFIA
CFID
CLRS(5)
Clear Status
Register
1
Write
BKA
50h
EE Block Erase
2
Write
BA
20h
Write
BA
D0h
BE Bank Erase
2
Write
BKA
80h
Write
BKA
D0h
PG Program
2
Write
WA
40h or 10h Write
WA
WD
DPG
Double Word
Program
3
Write
WA1
30h
Write
WA1
WD1
Write
WA2
WD2
TPG
Tetra Word
Program
5
Write
WA1
55h
Write
WA1
WD1
Write
WA2
WD2
Write
WA3
WD3
Write
WA4
WD4
Program
PES Erase
1
Write
BKA
B0h
Suspend
Program
PER Erase
1
Write
BKA
D0h
Resume
BP Block Protect 2
Write
BA
60h
Write
BA
01h
BU
Block
Unprotect
2
Write
BA
60h
Write
BA
D0h
BL Block Lock
2
Write
BA
60h
Write
BA
2Fh
Protection
PRP Register
2
Write
PA
C0h
Write
PA
PD
Program
Lock Protec-
LPRP tion Register 2
Write
LPA
Program
C0h
Write
LPA
LPD
Write Read
CR Configuration 2
Register
Write
RCA
60h
Write
RCA
03h
Note: 1. First cycle command address should be the same as the operation’s target address. The first cycle of the RD, RSR, RSIG or RCFI
instruction is followed by read operations in the bank array or special register. Any number of read cycles can occur after one com-
mand cycle.
2. BKA = Address within the bank, BA = Block Address, EA = Electronic Signature Address, CFIA = Common Flash Interface Address;
WA = Word Address, PA = Protection Register Address, LPA = Lock Protection Register Address, RCA = Read Configuration Reg-
ister Address, PD = Protection Data, CFID = Common Flash Interface Data, ED = Electronic Signature Data, WD = Word Data, LPD
= Lock protection Register Data
3. WA1, WA2, WA3 and WA4 must be consecutive address differing only for address bits A1-A0.
4. Read cycle after CLSR instruction will output the memory array.
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