MAX519ACSE データシートの表示（PDF） - Maxim Integrated

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MAX519ACSE

2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs

Maxim Integrated 

2-Wire Serial 8-Bit DACs with

Rail-to-Rail Outputs

µC

SDA SCL

E2 PROM

XICOR

X24C04

SCL

SDA

DUAL

DAC OUT0

SCL MAX518

OUT1

SDA

AD0

AD1

SINGLE

+5V

DAC OUT0

SCL MAX517

SDA

AD0

AD1

Figure 12. MAX517/MAX518/MAX519 Used in a Typical I2C

Application Circuit

Additional START Conditions

It is possible to interrupt a transmission to a device with

a new START (repeated start) condition (perhaps

addressing another device), which leaves the input

latches with data that has not been transferred to the

output latches (Figure 13). Only the currently addressed

device will recognize a STOP condition and transfer

data to its output latches. If the device is left with data in

its input latches, the data can be transferred to the out-

put latches the next time the device is addressed, as

long as it receives at least one command byte and a

STOP condition.

Early STOP Conditions

The addressed device recognizes a STOP condition at

any point in a transmission. If the STOP occurs during a

command byte, all previous uninterrupted command

and output byte pairs are accepted, the interrupted

command byte is ignored, and the transmission ends

(Figure 14a). If the STOP occurs during an output byte,

all previous uninterrupted command and output byte

pairs are accepted, the final command byte’s PD and

RST bits are accepted, the interrupted output byte is

ignored, and the transmission ends (Figure 14b).

Analog Section

DAC Operation

The MAX518 and MAX519 contain two matched volt-

age-output DACs. The MAX517 contains a single DAC.

The DACs are inverted R-2R ladder networks that con-

vert 8-bit digital words into equivalent analog output

voltages in proportion to the applied reference volt-

ages. The MAX518 has both DAC’s reference inputs

connected to VDD. Figure 15 shows a simplified dia-

gram of one DAC.

MAX517/MAX519 Reference Inputs

The MAX517 and MAX519 can be used for multiplying

applications. The reference accepts a 0V to VDD volt-

01 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0

SDA

START

CONDITION

ADDRESS BYTE

(DEVICE 0)

ACK

COMMAND BYTE

ACK

ADDRESSING DAC0

OUTPUT BYTE

ACK

(FULL SCALE)

( ) DEVICE 0's

DAC0 INPUT LATCH

SET TO FULL SCALE.

01 01 10 100

ADDRESS BYTE

ACK

(DEVICE 1)

REPEATED START

CONDITION

0 000 000 00 1 1 111 11 1 0

SDA

COMMAND BYTE

ACK

(ADDRESSING DAC0)

OUTPUT BYTE

ACK

(FULL SCALE)

STOP

CONDITION

( ) ( ) DEVICE 1's DAC0

INPUT LATCH SET

TO FULL SCALE.

ONLY DEVICE 1's DAC0 OUTPUT LATCH SET TO FULL

SCALE. DEVICE 0's OUTPUT LATCH UNCHANGED.

Figure 13. Repeated START Conditions

12 ______________________________________________________________________________________

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