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MAX5258 データシートの表示(PDF) - Maxim Integrated

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MAX5258 Datasheet PDF : 20 Pages
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+3V/+5V, Low-Power, 8-Bit Octal DAC
with Rail-to-Rail Output Buffers
Load All DACs with Shift-Register Data
A2
A1
A0
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
Don’t Care
1
0
0
8-Bit Data
(LDAC = X)
All eight DAC registers are updated with shift-register data. This command allows all DACs to be set to any analog
value within the reference range. This command can be used to substitute CLEAR if code 00 (hex) is programmed,
which clears all DACs. This command brings the device out of shutdown.
Load Input Register, DAC Registers Unchanged (Single Update Operation)
A2
A1
A0
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
Address
1
0
1
8-Bit Data
(LDAC = X)
When performing a single update operation, A2-A0 selects the respective input register. At the rising edge of CS, the
selected input register is loaded with the current shift-register data. All DAC outputs remain unchanged. This pre-
loads individual data in the input register without changing the DAC outputs.
Load Input and DAC Registers
A2
A1
A0
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
Address
1
1
0
8-Bit Data
(LDAC = X)
This command directly loads current shift-register data in the selected input and DAC registers at the rising edge of
CS. A2-A0 set the DAC address.
For example, to load all eight DAC registers simultaneously with individual settings, eight commands are required.
First perform seven single input register update operations (C2 = 1, C1 = 0, C0 = 1) for DACs A, B, C, D, E, F, and G
(C2 = 1, C1 = 0, C0 = 1). The final command loads input register H and updates all eight DAC registers from their
respective input registers. This command brings the device out of shutdown.
Software “LDAC” Command
A2
A1
A0
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
Address
1
1
1
8-Bit Data
(LDAC = X)
All DAC registers are updated with the contents of their respective input registers at the rising edge of CS. This is a
synchronous software command that performs the same function as the asynchronous LDAC.
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