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MAX5942ACSE(2003) データシートの表示(PDF) - Maxim Integrated

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MAX5942ACSE Datasheet PDF : 24 Pages
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IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
Table 3. Component Suppliers
COMPONENT
Power FETS
Current-Sense Resistors
Diodes
Capacitors
Magnetics
SUPPLIERS
International Rectifier
Fairchild
Vishay-Siliconix
Dale-Vishay
IRC
ON Semi
General Semiconductor
Central Semiconductor
Sanyo
Taiyo Yuden
AVX
Coiltronics
Coilcraft
Pulse Engineering
WEBSITE
www.irf.com
www.fairchildsemi.com
www.vishay.com/brands/siliconix/main.html
www.vishay.com/brands/dale/main.html
www.irctt.com/pages/index.cfm
www.onsemi.com
www.gensemi.com
www.centralsemi.com
www.sanyo.com
www.t-yuden.com
www.avxcorp.com
www.cooperet.com
www.coilcraft.com
www.pulseeng.com
6) Choose RSENSE according to the following equation:
RSENSE
NS
NP
VILIM
×1.2 × IOUTMAX
where:
VILIM is the current-sense comparator trip threshold
voltage (0.465V).
NS/NP is the secondary-side turns ratio (5/14 in this
example).
IOUTMAX is the maximum DC output current (10A in
this example):
RSENSE
6
0.465V
×1.2 ×10
=
90.4m
14
7) Choose the inductor value so that the peak ripple
current (LIR) in the inductor is between 10% and
20% of the maximum output current:
L (VOUT + VD ) × (1-DMIN)
2 × LIR × 275kHz × IOUTMAX
where VD is the output Schottky diode forward-volt-
age drop (0.5V) and LIR is the ratio of inductor rip-
ple current to DC output current:
8) The size and ESR of the output filter capacitor deter-
mine the output ripple. Choose a capacitor with a
low ESR to yield the required ripple voltage.
Use the following equations to calculate the peak-to-
peak output ripple:
VRIPPLE = VR2IPPLE,ESR + VR2IPPLE,C
where:
VRIPPLE is the combined RMS output ripple due to
VRIPPLE,ESR, the ESR ripple, and VRIPPLE,C, the
capacitive ripple. Calculate the ESR ripple and
capacitive ripple as follows:
VRIPPLE,ESR = IRIPPLE x ESR
VRIPPLE,C = IRIPPLE/(2 x π x 275kHz x COUT)
Layout Recommendations
All connections carrying pulsed currents must be very
short, be as wide as possible, and have a ground plane
as a return path. The inductance of these connections
must be kept to a minimum due to the high di/dt of the
currents in high-frequency switching power converters.
Current loops must be analyzed in any layout pro-
posed, and the internal area kept to a minimum to
reduce radiated EMI. Ground planes must be kept as
intact as possible.
L (5.5) × (1- 0.198) = 4.01µH
0.4 × 275kHz ×10A
20 ______________________________________________________________________________________

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