MB86391 データシートの表示（PDF） - Fujitsu

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MB86391

MPEG2 1chip Audio/Video Encoder

Fujitsu 

2.3.2 Host/SDRAM interface

FUJITSU LIMITED

Proprietary and Confidential

Table 2.3.2 : Host/SDRAM interface pins

Pin No.

Pin symbol

44

BCLK

88,89

ADRS27:26

90 to 92,

116 to 114,

107 to 101,

ADRS17:2

111 to 113

55 to 50,48,47,

56 to 60,

63 to 65, D31:0

74 to 67,75,76,

79 to 81,

83 to 85

32,31

IRQ9:8

23

XAS

22

XRDWR

41

43,42

30

29

36

38

37

21

39

40

95

XCS0

XCS5:4

XBMREQ

XBREQ

XBGRNT

XBUSEN

BUSDIR

XREADY

XEXTIRPT

XERROR

XSPWE

94

XSPCAS

93

XSPRAS

98

SPCKE

97

SPSDCLK

Pin name Bit I/O Active

Bus Clock 1 O −

Address

27:26

2 I/O

−

Address

17:2

16 I/O

−

Data31:0 32 I/O −

Interrupt

Request 9:8

2

I

L

Address 1 I/O L

Strobe

Read/Write 1 I/O −

Chip Select 1 O

L

0

Chip Select

5:4

2

O

L

Burst Mode

Request

1

I

L

Bus

Request

1

I

L

Bus Grant 1 O L

Bus Buffer

Enable

1

O

L

Bus Buffer 1 O

Direction

−

Ready 1 I/O L

External

Interrupt

1O

L

Error

1O L

Write

Enable

1O

L

Column

Address 1 O L

Strobe

Row

Address 1 O L

Strobe

Clock

1O H

Enable

SDRAM

Clock

1O

−

Pull

up/down

Pin function

−

Host/SDRAM interface bus clock

(27MHz) output pin

−

Address (upper 2bits) I/O pins

Address (lower 16bits) I/O pins

−

32bit data I/O pins

−

pullup

−

−

pullup

−

pullup

pullup

−

−

−

−

−

−

−

−

−

Interrupt request input pins. When not in

use, connect to either OPEN or VDDE.

Address strobe I/O pin

Read/write I/O pin:

‘H’ = Read

‘L’ = Write

Chip select 0 output pin

Chip select 5:4 output pins

Burst transfer request input pin

Bus privilege request input pin

Bus grant output pin

Bus buffer enable output pin

Bus buffer direction control output pin

Ready I/O pin

External host interruption request pin

Error output pin

Write enable output pin to SDRAM

connected to host/SDRAM interface

Column address strobe output pin to

SDRAM connected to host/SDRAM

interface

Row address strobe output pin to SDRAM

connected to host/SDRAM interface

−

Clock enable output pin to SDRAM

connected to host/SDRAM interface

−

Clock output pin to SDRAM connected to

hos t/SDRAM interface

MB86391

Product Specification

Rev. 1.1

12, November 2001

10

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