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MB89150 データシートの表示(PDF) - Fujitsu

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MB89150 Datasheet PDF : 52 Pages
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MB89150/150A Series
s BLOCK DIAGRAM
X0
Main clock
X1
oscillator
Clock controller
X0A
Subclock oscillator
X1A
(32.768 kHz)
RST
Reset circuit
(WDT)
8
P00/INT20
to P07/INT27
4
P10/INT10
to P13/INT13
4
P14 to P17
8 External interrupt 2
(wake-up function)
CMOS I/O port
4
External interrupt 1
(wake-up function)
CMOS I/O port
RAM
(Max. 256 × 8bits)
F2MC-8L
CPU
ROM
(Max. 16 K × 8 bits)
Other pins
MOD0, MOD1, VCC, VSS
21-bit time-base
timer
8-bit timer/counter
P22/TO
8-bit timer/counter
P20/EC
8-bit serial I/O
P25/SCK
P24/SO
P23/SI
Buzzer output
N-ch open-drain I/O port
N-ch open-drain output port
16
LCD controller/
driver
36 × 4 bits
VRAM
P27/BUZ*4
2
P21*4,P26*4
4
P54/SEG32*3
to P57/SEG35*3
4
P50/SEG28*3
to P53/SEG31*3
4
P44/SEG24*3
to P47/SEG27*3
4
P40/SEG20*3
to P43/SEG23*3
20
SEG0 to SEG19
4
COM0 to COM3
4
V0 to V3
Reference voltage
generator and
booster*1
Remote control
output
N-ch open-drain output port
(Only P30 is a CMOS output type.)
P32/C0*2
P31/C1*2
P30/RCO
*1: Selected by mask option
*2: Used as ports without a reference voltage generator and booster
*3: Functions selected by mask option
*4: N-ch open-drain high-current drive type
19

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