MB89580B データシートの表示（PDF） - Fujitsu

部品番号

コンポーネント説明

メーカー

MB89580B

8-bit Proprietary Microcontrollers

Fujitsu 

MB89580B/580BW series

The PS register can further be divided into the register bank pointer in the higher 8 bits (RP) and the condition code

register in the lower 8 bits (CCR) . (See the diagram below.)

RP

CCR

bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 CCR initial value

PS R4 R3 R2 R1 R0 − − − H I IL1 IL0 N Z V C X011XXXXB

X : Undefined

H-Flag

I-Flag

IL 1,0

N-Flag

Z-Flag

V-Flag

C-Flag

The RP points to the address of the register bank currently in use. The relationship between the pointer contents

and the actual address is based on the conversion rule shown next.

Rule for Conversion of Actual Addresses in the General-purpose Register Area

RP higher bits OP code in lower bits

"0" "0" "0" "0" "0" "0" "0" "1" R4 R3 R2 R1 R0 b2 b1 b0

Generated addresses

A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

The CCR consists of the bits indicating arithmetic operation results or transfer data contents and the bits that

control CPU operations at the time of an interrupt.

H flag

I flag

IL1, 0

: The flag is set to “1” when an arithmetic operation results in a carry from bit 3 to bit 4 or in a borrow

from bit 4 to bit 3. The bit is cleared to “0” in other instances. The flag is for decimal adjustment

instructions; do not use for other than additions and subtractions.

: Interrupt is enabled when this flag is set to “1.” Interrupt is disabled when this flag is set to “0.” The

flag is set to “0” when reset.

: Indicates the level of the interrupt currently enabled. An interrupt is processed only if its level is

higher than the value this bit indicates.

IL1 IL0

00

01

10

11

Interrupt level

1

High-low

Higher

2

3

Lower = no interruption

16

Share Link: