MB90480B データシートの表示（PDF） - Fujitsu

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MB90480B

16-bit Microcontroller

Fujitsu 

MB90480B/485B Series

■ BLOCK DIAGRAM

X0, X1, RST

X0A, X1A

8

MD2, MD1, MD0

Clock control

Circuit

RAM

CPU

F2MC16LX series core

Interrupt controller

ROM

8/16-bit PPG

PPG0 to PPG5

SIN0

SOT0

SCK0

SIN1, SIN2

SOT1, SOT2

SCK1, SCK2

AVCC

AVRH

AVSS

ADTG

AN0 to AN7

PWC0

PWC1

PWC2

DMAC

Communication

prescaler

2

UART

Extended I/O serial

interface 2 channels

A/D converter

( 8/10-bit )

PWC 3 channels

8/16-bit

up/down

counter/timer

PG

AIN0, AIN1

BIN0, BIN1

ZIN0, ZIN1

EXTC

MT00

MT01

Chip select

Input/output timer

16-bit input capture

2 channels

16-bit output compare

6 channels

16-bit free-run timer

16-bit reload timer

I2C interface

External interrupt

CS0 to CS3

IN0, IN1

OUT0 to OUT5

TIN0

TOT0

SCL

SDA

8 IRQ0 to IRQ7

I/O port

88 88888888 4

P00 P10 P20 P30 P40 P50 P60 P70 P80 P90 PA0

to to to to to to to to to to to

P07 P17 P27 P37 P47 P57 P67 P77 P87 P97 PA3

: Only MB90485B series

P00 to P07 (8 pins) : with an input pull-up resistance setting register.

P10 to P17 (8 pins) : with an input pull-up resistance setting register.

P40 to P47 (8 pins) : with an open drain setting register.

P70 to P77 (8 pins) : with an open drain setting register.

MB90485B series only

I2C pin P77 and P76 are N-ch open drain pin (without P-ch) . However, MB90V485B uses

the N-ch open drain pin (with P-ch) .

P20 to P27, P30 to P37, P40 to P47 and P70 to P77 are also used as 3 V/5 V I/F pin.

As for MB90V485B, input pins (PWC0, PWC1, PWC2/EXTC/SCL and SDA pins) for PWC/

PG/I2C become CMOS input.

Note : In the above diagram, I/O ports share internal function blocks and pins. However, when a

set of pins is used with an internal module, it cannot also be used as an I/O port.

18

DS07-13722-11E

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