MBM29LV800BE90TN データシートの表示（PDF） - Fujitsu

部品番号

コンポーネント説明

メーカー

MBM29LV800BE90TN

FLASH MEMORY CMOS 8 M (1 M × 8/512 K × 16) BIT

Fujitsu 

MBM29LV800TE/BE60/70/90

If hardware reset occurs during the programming operation, it is impossible to guarantee the data are being

written.

Programming is allowed in any sequence and across sector boundaries. Beware that a data “0” cannot be

programmed back to a “1”. Attempting to do so may either hang up the device or result in an apparent success

according to the data polling algorithm but a read from read/reset mode will show that the data is still “0”. Only

erase operations can convert “0”s to “1”s.

“Embedded ProgramTM Algorithm” in “s FLOW CHART” illustrates the Embedded ProgramTM Algorithm using

typical command strings and bus operations.

Chip Erase

Chip erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the

“set-up” command. Two more “unlock” write cycles are then followed by the chip erase command.

Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase

Algorithm command sequence the devices will automatically program and verify the entire memory for an all

zero data pattern prior to electrical erase (Preprogram function) . The system is not required to provide any

controls or timings during these operations.

The automatic erase begins on the rising edge of the last WE pulse in the command sequence and terminates

when the data on DQ7 is “1” (See Write Operation Status section.) at which time the device returns to read the

mode.

Chip Erase Time; Sector Erase Time × All sectors + Chip Program Time (Preprogramming)

“Embedded EraseTM Algorithm” in “s FLOW CHART” illustrates the Embedded EraseTM Algorithm using typical

command strings and bus operations.

Sector Erase

Sector erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the

“set-up” command. Two more “unlock” write cycles are then followed by the Sector Erase command. The sector

address (any address location within the desired sector) is latched on the falling edge of WE, while the command

(Data = 30h) is latched on the rising edge of WE. After time-out of “tTOW” from the rising edge of the last sector

erase command, the sector erase operation will begin.

Multiple sectors may be erased concurrently by writing the six bus cycle operations on “MBM29LV800TE/BE

Command Definitions” in “s DEVICE BUS OPERATION”. This sequence is followed with writes of the Sector

Erase command to addresses in other sectors desired to be concurrently erased. The time between writes must

be less than “tTOW” otherwise that command will not be accepted and erasure will not start. It is recommended

that processor interrupts be disabled during this time to guarantee this condition. The interrupts can be re-

enabled after the last Sector Erase command is written. A time-out of “tTOW” from the rising edge of the last WE

will initiate the execution of the Sector Erase command (s) . If another falling edge of the WE occurs within the

“tTOW” time-out window the timer is reset. (Monitor DQ3 to determine if the sector erase timer window is still open,

see section DQ3, Sector Erase Timer.) Once execution has begun resetting the devices will corrupt the data in

the sector. In that case, restart the erase on those sectors and allow them to complete. (Refer to the Write

Operation Status section for Sector Erase Timer operation.) Loading the sector erase buffer may be done in any

sequence and with any number of sectors (0 to 18) .

Sector erase does not require the user to program the devices prior to erase. The devices automatically program

all memory locations in the sector (s) to be erased prior to electrical erase (Preprogram function) . When erasing

a sector or sectors the remaining unselected sectors are not affected. The system is not required to provide any

controls or timings during these operations.

The automatic sector erase begins after the “tTOW” time out from the rising edge of the WE pulse for the last

sector erase command pulse and terminates when the data on DQ7 is “1” (See Write Operation Status section.)

at which time the devices return to the read mode. Data polling must be performed at an address within any of

the sectors being erased. Multiple Sector Erase Time; [Sector Erase Time + Sector Program Time (Preprogram-

ming) ] × Number of Sector Erase

20

Share Link: