MC68HC11A1MFN2 データシートの表示（PDF） - Motorola => Freescale

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MC68HC11A1MFN2

HCMOS Single-Chip Microcontroller

Motorola => Freescale 

(SCI) and a separate synchronous serial peripheral interface (SPI) are included. The main

16-bit free-running timer system has three input capture lines, five output compare lines, and

a real-time interrupt function. An 8-bit pulse accumulator subsystem can count external

events or measure external periods.

Self monitoring circuitry is included on-chip to protect against system errors. A computer op-

erating properly (COP) watchdog system protects against software failures. A clock monitor

system generates a system reset in case the clock is lost or runs too slow. An illegal opcode

detection circuit provides a non-maskable interrupt if an illegal opcode is detected.

Two software controlled operating modes, WAIT and STOP, are available to conserve addi-

tional power.

1

MODA/

LIR

MODB/

VSTBY

XTAL EXTAL E

MODE

CONTROL

OSCILLATOR

CLOCK LOGIC

IRQ XIRQ

RESET

INTERRUPT LOGIC

CPU

TIMER

SYSTEM

BUS EXPANSION

ADDRESS

ADDRESS/DATA

STROBE AND HANDSHAKE

PARALLEL I/O

8 KBYTES ROM

VDD

VSS

512 BYTES EEPROM

256 BYTES RAM

VRH

VRL

SPI

SCI

A/D CONVERTER

PORT A

PORT B

CONTROL

PORT C

CONTROL

PORT D

PORT E

* NOT BONDED ON 48-PIN VERSION.

Figure 1-1 Block Diagram

A8 BLOCK

1.3 Programmer’s Model

In addition to being able to execute all M6800 and M6801 instructions, the MC68HC11A8 al-

lows execution of 91 new opcodes. Figure 1-2 shows the seven CPU registers which are

available to the programmer.

MOTOROLA

1-2

INTRODUCTION

MC68HC11A8

TECHNICAL DATA

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