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MCF51JE128CLK データシートの表示(PDF) - Freescale Semiconductor

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MCF51JE128CLK
Freescale
Freescale Semiconductor Freescale
MCF51JE128CLK Datasheet PDF : 47 Pages
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Features
Table 2. MCF51JE256/128 Functional Units
Unit
DAC (digital to analog converter)
12-BIT SAR ADC (analog-to-digital
converter)
PDB (Programmable Delay Block)
Mini-FlexBus
USB On-the-Go
CMT (Carrier Modulator Timer)
MCG (Multipurpose Clock Generator)
BDM (Background Debug Module)
CF1 CORE (V1 ColdFire Core)
PRACMP
COP (Computer Operating Properly)
IRQ (Interrupt Request)
CRC (Cyclic Redundancy Check)
DBG (Debug)
FLASH (Flash Memory)
IIC (Inter-integrated Circuits)
INTC (Interrupt Controller)
KBI1 & KBI2
LVD (Low-voltage Detect)
VREF (Voltage Reference)
RAM (Random-Access Memory)
RGPIO (Rapid General-purpose
Input/output)
SCI1, SCI2 (Serial Communications
Interfaces)
SIM (system integration unit)
Function
Used to output voltage levels.
Measures analog voltages at up to 12 bits of resolution. The ADC has
up to 12 single-ended inputs.
Precisely trigger the DAC FIFO buffer.
Provides expansion capability for off-chip memory and peripherals.
Supports the USB On-the-Go dual-role controller.
Infrared output used for the Remote Controller operation.
Provides clocking options for the device, including a phase-locked loop
(PLL) and frequency-locked loop (FLL) for multiplying slower reference
clock sources.
Provides single pin debugging interface (part of the V1 ColdFire core).
Executes programs and interrupt handlers.
Analog comparators for comparing external analog signals against
each other, or a variety of reference levels.
Software Watchdog.
Single-pin high-priority interrupt (part of the V1 ColdFire core).
High-speed CRC calculation.
Provides debugging and emulation capabilities (part of the V1 ColdFire
core).
Provides storage for program code, constants, and variables.
Supports standard IIC communications protocol and SMBus.
Controls and prioritizes all device interrupts.
Keyboard Interfaces 1 and 2.
Provides an interrupt to the ColdFire V1 CORE in the event that the
supply voltage drops below a critical value. The LVD can also be
programmed to reset the device upon a low voltage event.
The Voltage Reference output is available for both on- and off-chip use.
Provides stack and variable storage.
Allows for I/O port access at CPU clock speeds. RGPIO is used to
implement GPIO functionality.
Serial communications UARTs capable of supporting RS-232 and LIN
protocols.
MCF51JE256 Datasheet, Rev. 4
Freescale Semiconductor
5

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