MCF51JE128CLK データシートの表示（PDF） - Freescale Semiconductor

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MCF51JE128CLK

An Energy-Efficient Solution from Freescale

Freescale Semiconductor 

Features

Table 2. MCF51JE256/128 Functional Units (continued)

Unit

Function

SPI1 (FIFO), SPI2 (Serial Peripheral

Interfaces)

SPI1 and SPI2 provide standard master/slave capability. SPI contains a

FIFO buffer in order to increase the throughput for this peripheral.

TPM1, TPM2 (Timer/PWM Module)

Timer/PWM module can be used for a variety of generic timer

operations as well as pulse-width modulation.

VREG (Voltage Regulator)

Controls power management across the device.

These devices incorporate redundant crystal oscillators. One is

XOSC1 and XOSC2 (Crystal Oscillators) intended primarily for use by the TOD, and the other by the CPU and

other peripherals.

MCF51JE256 Datasheet, Rev. 4

6

Freescale Semiconductor

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