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MCM20027IBBL データシートの表示(PDF) - Motorola => Freescale

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MCM20027IBBL Datasheet PDF : 73 Pages
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
ImageMOS
8.4 Tristate Mode
The sensors HCLK, SOF, VCLK, SYNC and STROBE
output signals as well as the pixel output data can be
tristated via the Tristate Control Register, (Table 23), on
page 42.
8.5 References CVREFP, CVREFM
The MCM20027 contains all internally generated refer-
ences and biases on-chip for system simplification. An
internally generated differential bandgap regulator de-
rives all the ADC and other analog signal processing re-
quired references. The user should connect 0.1µF
capacitors to the CVREFP and CVREFM pins (#15 and
#14 respectively) to accurately hold the biases.
8.7 Internal Bias Current Control
The ASP chain has internally generated bias currents
that result in an operating power consumption of nearly
400mW approx. (Accurate value will be given upon sen-
sor testing). By attaching a resistor between pin 20, EX-
TRES; and Pin19, the user can reduce the power
consumption of the device. This feature is enabled by
writing a 1b to bit res of the Power Configuration Regis-
ter. Additional power savings can be achieved at lower
clock rates. Note - The External Bias resistor Input pin
(EXTRESP - pin #20) should be connected to the
ETRESRTN (pin#19) in the manner described in the di-
agram below.
EXTRESP
(pin #20)
Resistor
8.6 Common Mode References: VAG, VAGREF and
VAGRETURN
The MCM20027 holds the Common Mode Reference
Voltages on the chip to a stable value. In order to
achieve this stable value, the VAG (pin #16),
VAGREF(pin #18 ) and VAGRETURN (pin #17) have to
be connected to two 0.1µF capacitors in the manner de-
scribed in the diagram below:
EXTRESRTN
(pin #19)
VAG
(pin #16)
VAGRETURN
(pin #17)
VAGREF
(pin #18)
0.1µF
0.1µF
Revision 8.4 - 24 Oct 2002: MCM20027
MOTOROLA
21

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