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ML6652CH データシートの表示(PDF) - Micro Linear Corporation

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ML6652CH Datasheet PDF : 28 Pages
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ML6652
PIN DESCRIPTIONS (continued)
Pin No. Signal Name
I/O
Description
CONTROL
13 TPOUTOFF#
I (CMOS)
Active low, the output stage of the twisted pair output is turned off. Contains
an on-chip 80kpull-up resister.
14 FOOUTOFF# I (CMOS)
24 PWRDWN# I (CMOS)
DATA SIGNAL INPUT/OUTPUT
1
TPOUTP
O
3
TPOUTN
O
Active low, the output stage of the fiber optic output is turned off. Contains an
on-chip 80kpull-up resister.
Active low, all the circuits are powered down. Configuration pins are read and
register bits are initialized 5µs (typ) after a rising edge of PWRDWN#.
Contains an on-chip 80kpull-up resister.
The two operating modes available for these pins are selected with the
configuration pin PECLTP (pin 7) or the configuration bit PECLTP <30.3>
Twisted Pair Interface Mode:
Transmit twisted pair positive and complementary outputs. These outputs form
a differential current output pair that drives Multi Level Transition (MLT-3)
waveforms into the network coupling transformer during 100Mbps mode,
Manchester encoded 10BASE-T data or Normal Link Pulses (NLPs) during
10Mbps mode, and Fast Link Pulse (FLP) Bursts during Auto-Negotiation.
TPOUTP and TPOUTN must have external pull up resistors to VCC (refer to
description of RTTP pin)
PECL/LVPECL Compatible Interface Mode:
PECL/LVPECL interface positive and complementary outputs. These outputs
form a differential current output pair that drives Non Return to Zero Inverted
(NRZI) encoded 100BASE-FX or 100BASE-SX symbols during 100Mbps mode,
Manchester encoded 10BASE-FL data or OPT_IDL during 10Mbps mode, and
Fiber Link Negotiation Pulse (FLNP) Bursts during Auto-Negotiation. TPOUTP
and TPOUTN must have external pull up resistors to VCC and be AC coupled
to the inputs of a fiber optic PMD module (refer to description of RTTP pin). A
resistor network may be needed to setup the common mode voltage at the
input pins of the PMD module
38
RTTP
I
Twisted pair PECL/LVPECL compatible driver bias resistor. An external resistor
connected between RTTP and ground sets a constant bias current for the
differential output driver circuitry TPOUTP/TPOUTN.
These output currents depend on the operating mode.
The recommended external component values are:
Twisted Pair Mode:
2kΩ, 1%, between RTTP and ground
50Ω, 1%, between TPOUTP and VCC
50Ω, 1%, between TPOUTN and VCC
PECL Compatible mode:
2kΩ, 1%, between RTTP and ground
Equivalent 62between TPOUTP and VCC
Equivalent 62between TPOUTN and VCC
Also AC coupled to the PMD inputs
10
TPINP
11
TPINN
I
The two operating modes available for these pins are selected with the
configuration pin PECLTP (Pin 7) or the configuration bit PECLTP <30.3>.
I
Twisted Pair Interface Mode:
Receive twisted pair positive and complementary inputs. These inputs form a
differential input pair that receives 100BASE-TX, FLP Burst, or 10BASE-T
signal from the network. The common mode voltage is set internally and the
differential input resistance is about 2k.
The network termination must be added externally. It should contain a 100
resister between pin 10 and 11 as shown in Figure 1.
8
January 2004
Final Datasheet
DS6652-F-02

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