MMFR-29C516E-31 データシートの表示（PDF） - Atmel Corporation

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MMFR-29C516E-31

16–Bit Flow–Through EDAC Error Detection And Correction unit

Atmel Corporation 

29C516E

10. Signal Timing

10.1. Memory Write

Figure 4.Memory Write Timing Diagram

U2/U1

N22

MD[0..15]

MC[0..7]

UD2[0..15]

1.5TRANS

RD/WR2

EN2

MEM2

t13

t20

t22

t19

t22

t23

t22

t23

t20

t2

t23

Memory Data Word

t14

t20

t22

1.5

1.5

t22

t21

t23

t22

t23

t20

t3

t23

Gen2e.5rated Check–bits

Propagation Delays

Output Enable /

Disable Times

t2 *

13 ns

t3 *

26 ns

t13 * t14 *

18 ns 30 ns

t19 * t20 * t21 * t22 *

23 ns 22 ns 22 ns 19 ns

( * : Max Value )

( * : Max Value )

Figure 5.Transfer Write Timing Diagram

U2/U1

UD2[0..15]

UD1[0..15]

TRANS

RD/WR1

EN1

MEM1

Propagation Delays

Output Enable /

Disable Times

t13

t20

t12

t22

t22

t22

t18

t1 *

14 ns

t12 *

20 ns

t18 * t19 *

23 ns 23 ns

t1

t13 *

18 ns

( * : Max Value )

t20 * t21 * t22 * t23 *

22 ns 22 ns 19 ns 19 ns

t21

t23

t23

t23

t19

( * : Max Value )

12

Rev. D (09 Dec. 97)

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