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PC66-222-920 データシートの表示(PDF) - Infineon Technologies
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コンポーネント説明
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PC66-222-920
3.3 V 8M × 64/72-Bit 1 Bank SDRAM Module, 3.3 V 16M × 64/72-Bit 2 Bank SDRAM Module
Infineon Technologies
PC66-222-920 Datasheet PDF : 17 Pages
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HYS 64(72)V8200/16220GU-8/-10
SDRAM Modules
AC Characteristics
3, 4
T
A
= 0 to 70
°
C;
V
SS
= 0 V;
V
CC
= 3.3 V
±
0.3 V,
t
T
= 1 ns
Parameter
Symbol
Limit Values
Unit
-8
-8B
PC100-222 PC100-323
-10
PC66
min. max. min. max. min. max.
Note
Clock and Clock Enable
Clock Cycle Time
t
CK
CAS Latency = 3
CAS Latency = 2
System Frequency
f
CK
CAS Latency = 3
CAS Latency = 2
Clock Access Time
t
AC
CAS Latency = 3
CAS Latency = 2
Clock High Pulse Width
Clock Low Pulse Width
Input Setup Time
Input Hold Time
CKE Setup Time
(Power down mode)
t
CH
t
CL
t
CS
t
CH
t
CKSP
CKE Setup Time
(Self Refresh Exit)
t
CKSR
Transition Time
t
T
(rise and fall)
10 –
10 –
10 –
ns
10 –
12 –
15 –
ns
–
100 –
100 –
100 MHz
–
100 –
83 –
66 MHz
–
6
–
6
3
–
3
–
2
–
1
–
2.5 –
8
–
–
6
–
7
3
–
3
–
2
–
1
–
2.5 –
10 –
–
8
–
9
3.5 –
3.5 –
3
–
1
–
3
–
8
–
ns
4, 5
ns
ns
6
ns
6
ns
7
ns
7
ns
8
ns
9
1
–
1
–
1
–
ns
Common Parameters
RAS to CAS delay
t
RCD
Precharge Time
t
RP
Active Command Period
t
RAS
Cycle Time
t
RC
Bank to Bank Delay Time
t
RRD
CAS to CAS Delay Time
t
CCD
(same bank)
20 –
20 –
30 –
ns
20 –
30 –
30 –
ns
50 100k 60 100k 70 100k ns
70 –
80 –
80 –
ns
16 –
20 –
20 –
ns
1
–
1
–
1
–
CLK
Semiconductor Group
9
1998-08-01
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