NAND01G-A データシートの表示（PDF） - STMicroelectronics
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NAND01G-A
STMicroelectronics
NAND01G-A Datasheet PDF : 57 Pages
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NAND128-A, NAND256-A, NAND512-A, NAND01G-A
Table 6. Address Insertion, x8 Devices
Bus Cycle I/O7
I/O6
I/O5
I/O4
I/O3
1st
A7
A6
A5
A4
A3
2nd
A16
A15
A14
A13
A12
3rd
A24
A23
A22
A21
A20
4th(4)
VIL
VIL
VIL
VIL
VIL
Note: 1. A8 is set Low or High by the 00h or 01h Command, see Pointer Operations section.
2. Any additional address input cycles will be ignored.
3. The 4th cycle is only required for 512Mb and 1Gb devices.
I/O2
A2
A11
A19
VIL
I/O1
A1
A10
A18
A26
I/O0
A0
A9
A17
A25
Table 7. Address Insertion, x16 Devices
Bus
Cycle
I/O8-
I/O15
I/O7
I/O6
I/O5
1st
X
A7
A6
A5
2nd
X
A16
A15
A14
3rd
X
A24
A23
A22
4th(4)
X
VIL
VIL
VIL
Note: 1. A8 is Don’t Care in x16 devices.
2. Any additional address input cycles will be ignored.
3. The 01h Command is not used in x16 devices.
4. The 4th cycle is only required for 512Mb and 1Gb devices.
I/O4
A4
A13
A21
VIL
I/O3
A3
A12
A20
VIL
I/O2
A2
A11
A19
VIL
I/O1
A1
A10
A18
A26
I/O0
A0
A9
A17
A25
Table 8. Address Definitions
Address
A0 - A7
A9 - A26
A9 - A13
A14 - A26
A8
Definition
Column Address
Page Address
Address in Block
Block Address
A8 is set Low or High by the 00h or 01h Command, and is
Don’t Care in x16 devices
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