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NIS5102QP2HT1(2006) データシートの表示(PDF) - ON Semiconductor

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NIS5102QP2HT1
(Rev.:2006)
ON-Semiconductor
ON Semiconductor ON-Semiconductor
NIS5102QP2HT1 Datasheet PDF : 14 Pages
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NIS5102
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Input Voltage, Operating, Steady−State (Input + to Input −)
Input Voltage, Operating, Transient (Input + to Input −), 1 second
Drain Voltage, Operating, Steady−State (Drain to Input −)
Drain Voltage, Operating, Transient (Drain to Input −), 1 second
Drain Current, Peak
Continuous Current (TA = 25°C, 0.5 in2 pad)
Voltage on Power Good Pin (Pin 7)
Thermal Resistance, Junction−to−Air
0.5 in2 Copper
1 in2 Copper
Vin
Vin
VDD
VDD
IDpk
IDavg
Vmax7
QJA
−0.3 to 18
−0.3 to 25
−0.3 to 18
−0.3 to 25
20
10
20
76.5
41.2
V
V
V
V
A
A
V
°C/W
°C/W
Thermal Resistance, Junction−to−Lead
QJL
3.2
°C/W
Power Dissipation (TA = 25°C, 0.5 in2 pad)
Pmax
1.4
W
Operating Temperature Range (Note 1)
TJ
−40 to 175
°C
Non−Operating Temperature Range
TJ
−55 to 175
°C
Lead Temperature, Soldering (10 Sec)
TL
235
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Actual maximum junction temperature is limited by an internal protection circuit and will not reach the absolute maximum temperature as
specified.
ELECTRICAL CHARACTERISTICS (VCC = 12 V, RLIMIT = 36 W, CCharge = 100 pF, TJ = 25°C unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
POWER FET
Delay Time (Enable High to IS = 100 mA)
Charging Time (IS = 100 mA to IS = 5.0 A, RLIMIT = 36 W)
ON Resistance (VCC = 12 V, IS = 5.0 A) (Note 2)
Zero Gate Voltage Drain Current
(VDS = 12 Vdc, VGS = 0 Vdc)
Tdly
2.0
tchg
1.0
RDSon
10
13
IDSS1
10
Zero Gate Voltage Drain Current
(VDS = 18 Vdc, VGS = 0 Vdc)
IDSS2
100
Output Capacitance (VDS = 12 Vdc, VGS = 0 Vdc, f = 10 kHz)
THERMAL LIMIT
Shutdown Temperature (Note 3)
Hysteresis (Note 3)
OVER/UNDERVOLTAGE
TSD
Thyst
125
135
145
40
UVLO Turn−on (Input + Increasing, RextUVLO = 620 k)
UVLO Hysteresis (Input + Decreasing, RextUVLO = 620 k)
OVLO Turn−off (Input + Increasing, RextUVLO = 620 k)
OVLO Hysteresis (Input + Decreasing, RextUVLO = 620 k)
PARALLEL SHUTDOWN (Alternate Function on OVLO Pin)
Von
Vhyst
Voff
Vhyst
10.05
0.45
14.0
0.6
11.15
0.62
16.4
0.78
12.30
0.75
19.0
1.0
Device Fan−out (Minimum External Resistor Value = 2.0 kW (Note 3)
Shutdown Voltage Threshold (OVLO Pin)
Shutdown State Output Voltage (Isink = 2.0 mA)
2. Pulse Test: Pulse width 300 ms, duty cycle 2%.
3. Verified by design.
Nfan
VSD
Vlow
4.0
0.6
0.8
0.3
0.4
Unit
ms
ms
mW
mA
mA
pF
°C
°C
V
V
V
V
Devices
V
V
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