NJW4351VC3 データシートの表示（PDF） - Japan Radio Corporation

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NJW4351VC3

Unipolar Stepper Motor Driver

Japan Radio Corporation  

NJW4351

POR – Power On And Reset Function

The POR connected to VDD is to prevent miss-step under unstable condition of the inputting of logic supply

voltage VDD.

After inputting VDD, the phase outputs are set to the initial energizing pattern output status.

PHASE OUTPUT BLOCK

The phase output block consists of four open-drain DMOS FET capable of sinking max 1.5A.

MO – Motor Origin Monitor

In initialized position of the Translator, MO output low to indicate to external devices that it is the initial energizing

pattern output status.

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Ver.2010-03-26

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