NXP Semiconductors
PCA9574
8-bit I2C-bus and SMBus, level translating, low voltage GPIO
6. Pinning information
6.1 Pinning
terminal 1
index area
PCA9574BS
INT 1
A0 2
RESET 3
P0 4
P1 5
P2 6
P3 7
VSS 8
PCA9574PW
16 VDD
15 SDA
14 SCL
13 P7
12 P6
11 P5
10 P4
9 VDD(IO)
002aad052
Fig 3. Pin configuration for TSSOP16
RESET 1
P0 2
P1 3
P2 4
12 SCL
11 P7
10 P6
9 P5
002aad053
Transparent top view
Fig 4. Pin configuration for HVQFN16
terminal 1
index area
PCA9574HR
P0 1
P1 2
P2 3
P3 4
12 SDA
11 SCL
10 P7
9 P6
Transparent top view
Fig 5. Pin configuration for HXQFN16U
002aad876
PCA9574_2
Product data sheet
Rev. 02 — 27 July 2009
© NXP B.V. 2009. All rights reserved.
5 of 32