PCF8536 データシートの表示（PDF） - NXP Semiconductors.

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PCF8536

Universal LCD driver for low multiplex rates including a 6 channel PWM generator

NXP Semiconductors. 

NXP Semiconductors

PCF8536

Universal LCD low multiplex driver with 6 channel PWM generator

Table 9. Effect of the power-down bit (PD)

Effect on function Mode settings

Effect of setting PD

0

backplane output

E=1

normal function

segment output

E=1

normal function

internal oscillator

OSC = 0, COE = 1

on

OSCCLK pin

OSC = 0, COE = 1

output of internal

oscillator frequency

OSCCLK pin

OSC = 1

input clock

GPO

GPO

static drive

PWM drive

static drive

PWM drive

1

VSS

VSS

off

VDD

clock input, can be

logic 0, logic 1, or left

floating

static drive

static drive

With the following sequence, the PCF8536 can be set to a state of minimum power

consumption, called power-down mode.

START

Disable display

by setting bit E

logic 0

External clock

can be

removed now

Enable power-

down mode

with PD = 1

PCF8536

Product data sheet

STOP

013aaa447

Fig 6. Recommended power-down sequence

Remarks:

• It is necessary to run the power-down sequence before removing the supplies.

Depending on the application, care must be taken that no other signals are present at

the chip input or output pins when removing the supplies (see Section 10). Otherwise

it may cause unwanted display artifacts. In case of an uncontrolled removal of supply

voltages, the PCF8536 will not be damaged.

• Static voltages across the liquid crystal display can build up when the external LCD

supply voltage (VLCD) is on while the IC supply voltage is off, or vice versa. This may

cause unwanted display artifacts. To avoid such artifacts, VLCD and VDD must be

applied or removed together.

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 6 October 2011

© NXP B.V. 2011. All rights reserved.

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